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Date:   Thu, 3 Nov 2022 15:48:42 +0100
From:   Joerg Roedel <joro@8bytes.org>
To:     Lu Baolu <baolu.lu@linux.intel.com>
Cc:     Jason Gunthorpe <jgg@nvidia.com>,
        Kevin Tian <kevin.tian@intel.com>,
        Will Deacon <will@kernel.org>,
        Robin Murphy <robin.murphy@arm.com>,
        Jean-Philippe Brucker <jean-philippe@linaro.com>,
        iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [RESEND PATCH v14 00/13] iommu: SVA and IOPF refactoring
Message-ID: <Y2PUyu46CN6iEHLc@8bytes.org>
References: <20221031005917.45690-1-baolu.lu@linux.intel.com>
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On Mon, Oct 31, 2022 at 08:59:04AM +0800, Lu Baolu wrote:
> Lu Baolu (13):
>   iommu: Add max_pasids field in struct iommu_device
>   iommu: Add max_pasids field in struct dev_iommu
>   iommu: Remove SVM_FLAG_SUPERVISOR_MODE support
>   PCI: Enable PASID only when ACS RR & UF enabled on upstream path
>   iommu: Add attach/detach_dev_pasid iommu interfaces
>   iommu: Add IOMMU SVA domain support
>   iommu/vt-d: Add SVA domain support
>   arm-smmu-v3/sva: Add SVA domain support
>   iommu/sva: Refactoring iommu_sva_bind/unbind_device()
>   iommu: Remove SVA related callbacks from iommu ops
>   iommu: Prepare IOMMU domain for IOPF
>   iommu: Per-domain I/O page fault handling
>   iommu: Rename iommu-sva-lib.{c,h}

Applied, thanks everyone.