From: Borislav Petkov <bp@alien8.de>
To: Ashok Raj <ashok.raj@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML Mailing List <linux-kernel@vger.kernel.org>,
X86-kernel <x86@kernel.org>, Tony Luck <tony.luck@intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Arjan van de Ven <arjan.van.de.ven@intel.com>,
Andy Lutomirski <luto@kernel.org>,
Jacon Jun Pan <jacob.jun.pan@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Kai Huang <kai.huang@intel.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [v2 01/13] x86/microcode/intel: Prevent printing updated microcode rev multiple times
Date: Fri, 4 Nov 2022 12:00:43 +0100 [thread overview]
Message-ID: <Y2Tw2+LCmZe8XBJn@zn.tnic> (raw)
In-Reply-To: <20221103175901.164783-2-ashok.raj@intel.com>
On Thu, Nov 03, 2022 at 05:58:49PM +0000, Ashok Raj wrote:
> @@ -696,8 +697,7 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
>
> csig->rev = c->microcode;
>
> - /* No extra locking on prev, races are harmless. */
> - if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
> + if (bsp && csig->rev != prev.rev) {
This basically means that the loader is not going to support mixed
steppings microcode.
Yes, no?
If yes, can I remove the patch cache too and use a single buffer for the
current patch?
That would simplify things even more.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2022-11-04 11:01 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-03 17:58 [v2 00/13] Make microcode late loading more robust Ashok Raj
2022-11-03 17:58 ` [v2 01/13] x86/microcode/intel: Prevent printing updated microcode rev multiple times Ashok Raj
2022-11-04 11:00 ` Borislav Petkov [this message]
2022-11-04 13:53 ` Van De Ven, Arjan
2022-11-04 15:52 ` Borislav Petkov
2022-11-04 18:28 ` Ashok Raj
2022-11-04 20:21 ` Borislav Petkov
2022-11-06 13:35 ` Borislav Petkov
2022-11-07 4:17 ` Ashok Raj
2022-11-07 16:12 ` Ashok Raj
2022-11-07 18:47 ` Borislav Petkov
2022-11-08 23:06 ` Ashok Raj
2022-11-08 23:32 ` Dave Hansen
2022-11-09 9:18 ` Borislav Petkov
2022-12-03 13:51 ` [tip: x86/microcode] x86/microcode/intel: Do not print microcode revision and processor flags tip-bot2 for Ashok Raj
2022-11-03 17:58 ` [v2 02/13] x86/microcode/intel: Print old and new rev after early microcode update Ashok Raj
2022-11-03 17:58 ` [v2 03/13] x86/microcode/intel: Fix a hang if early loading microcode fails Ashok Raj
2022-11-09 11:25 ` Borislav Petkov
2022-11-09 16:07 ` Ashok Raj
2022-11-09 23:34 ` Borislav Petkov
2022-11-03 17:58 ` [v2 04/13] x86/microcode: Fix microcode_check() compare after a new uCode update Ashok Raj
2022-11-03 17:58 ` [v2 05/13] x86/microcode: Move late-load warning to earlier where kernel taint happens Ashok Raj
2022-11-03 17:58 ` [v2 06/13] x86/ipi: Support sending NMI_VECTOR as self ipi Ashok Raj
2022-11-03 17:58 ` [v2 07/13] x86/microcode: Place siblings in NMI loop while update in progress Ashok Raj
2022-11-03 17:58 ` [v2 08/13] x86/mce: Warn of a microcode update is in progress when MCE arrives Ashok Raj
2022-11-03 17:58 ` [v2 09/13] x86/microcode/intel: Add minimum required revision to microcode header Ashok Raj
2022-11-03 17:58 ` [v2 10/13] x86/microcode: Add a generic mechanism to declare support for minrev Ashok Raj
2022-11-03 17:58 ` [v2 11/13] x86/microcode/intel: Drop wbinvd() from microcode loading Ashok Raj
2022-11-03 17:59 ` [v2 12/13] x86/microcode: Display revisions only when update is successful Ashok Raj
2022-11-03 17:59 ` [v2 13/13] x86/microcode/intel: Add ability to update microcode even if rev is unchanged Ashok Raj
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