From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02B2FC4332F for ; Wed, 23 Nov 2022 09:05:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237009AbiKWJFG (ORCPT ); Wed, 23 Nov 2022 04:05:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237042AbiKWJEq (ORCPT ); Wed, 23 Nov 2022 04:04:46 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 694541025D6 for ; Wed, 23 Nov 2022 01:04:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1669194274; x=1700730274; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=gAQRuYWg/Tk+lKUpTo8FpAd2y7tRkY04gj36jj3Nf30=; b=OsGcQ1aPFfFPtpt1SXXZc73o2kuDvbv2FrL1lULw3ADZHS2ubwljYYYW 4ePdYRA4agRZowz49zzLu7SVHboOtKnInwZcZEKPUG4TXlTmtB98Yykfz mVZRh6L3Ijzg0DTzh9KFC84FGsqKjycjsRjOeN3jwsrnITIsVCH8qKILf yFgzRFEUUasZuS6njcHqsj4CduY3IPTZnwScR1CmNyLUKGz8x0/7EhMHk kc+sHJj3MaDEnoRJ0AX186uLslZ9O4wXQRyPVTC6MiqiexABwWjNr6HAU c98fyCF0t/a9b39fETYB+zNUfFUfcXvzdZNebTNQ7gvbLGlYD54XMmKy8 w==; X-IronPort-AV: E=Sophos;i="5.96,186,1665471600"; d="scan'208";a="124738248" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Nov 2022 02:04:33 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 23 Nov 2022 02:04:33 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Wed, 23 Nov 2022 02:04:31 -0700 Date: Wed, 23 Nov 2022 09:04:13 +0000 From: Conor Dooley To: Samuel Holland CC: , , Anup Patel , Palmer Dabbelt , Palmer Dabbelt , , , , , , Subject: Re: [PATCH v2] Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend" Message-ID: References: <20221122121620.3522431-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hey Samuel, On Tue, Nov 22, 2022 at 11:49:49PM -0600, Samuel Holland wrote: > On 11/22/22 06:16, Conor Dooley wrote: > > This reverts commit 232ccac1bd9b5bfe73895f527c08623e7fa0752d. > > To fix this, the x86 C3STOP feature was enabled for the timer driver - > > C3STOP isn't inherently x86-specific. I think I originally had feature with "s around it & meant this as a tongue-in-cheek reference to the header, which describes it as an "x86 (mis)feature" or something like that. Think I decided against that but forgot to drop the x86 bit.. Could easily do s/x86// and it'd still make sense. > > Fortunately, the D1 has a second timer, which is "currently used in > > preference to the RISC-V/SBI timer driver" so a revert here does not > > hurt operation of D1 in it's current form. > > typo: its Good spot :) > Acked-by: Samuel Holland Thanks! Perhaps the two minor commit message bits could be fixed on application? Otherwise, I will send a reworded one in a few days. Conor.