[PATCH v3 1/5] arm: dts: qcom: mdm9615: align pinctrl subnodes with dt-schema bindings

Neil Armstrong
2022-10-21T15:29:12Z

Align the MDM9615 DT to the expected subnodes namings in the dt-schema
bindings.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
.../boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts | 8 ++++----
arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 22 +++++++++++-----------
2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts
index 4e53b3d70195..30a110984597 100644
--- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts
+++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts
@@ -45,8 +45,8 @@ &msmgpio {
* - 42: IOT0_GPIO1 and SD Card Detect
*/

- gpioext1_pins: gpioext1_pins {
- pins {
+ gpioext1_pins: gpioext1-state {
+ gpioext1-pins {
pins = "gpio2";
function = "gpio";
input-enable;
@@ -54,8 +54,8 @@ pins {
};
};

- sdc_cd_pins: sdc_cd_pins {
- pins {
+ sdc_cd_pins: sdc-cd-state {
+ sdc-cd-pins {
pins = "gpio42";
function = "gpio";
drive-strength = <2>;
diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
index 2fe8693dc3cd..92c8003dac25 100644
--- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
@@ -22,8 +22,8 @@ &msmgpio {
pinctrl-0 = <&reset_out_pins>;
pinctrl-names = "default";

- gsbi3_pins: gsbi3_pins {
- mux {
+ gsbi3_pins: gsbi3-state {
+ gsbi3-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "gsbi3";
drive-strength = <8>;
@@ -31,8 +31,8 @@ mux {
};
};

- gsbi4_pins: gsbi4_pins {
- mux {
+ gsbi4_pins: gsbi4-state {
+ gsbi4-pins {
pins = "gpio12", "gpio13", "gpio14", "gpio15";
function = "gsbi4";
drive-strength = <8>;
@@ -40,15 +40,15 @@ mux {
};
};

- gsbi5_i2c_pins: gsbi5_i2c_pins {
- pin16 {
+ gsbi5_i2c_pins: gsbi5-i2c-state {
+ sda-pins {
pins = "gpio16";
function = "gsbi5_i2c";
drive-strength = <8>;
bias-disable;
};

- pin17 {
+ scl-pins {
pins = "gpio17";
function = "gsbi5_i2c";
drive-strength = <2>;
@@ -56,8 +56,8 @@ pin17 {
};
};

- gsbi5_uart_pins: gsbi5_uart_pins {
- mux {
+ gsbi5_uart_pins: gsbi5-uart-state {
+ gsbi5-uart-pins {
pins = "gpio18", "gpio19";
function = "gsbi5_uart";
drive-strength = <8>;
@@ -65,8 +65,8 @@ mux {
};
};

- reset_out_pins: reset_out_pins {
- pins {
+ reset_out_pins: reset-out-state {
+ reset-out-pins {
pins = "gpio66";
function = "gpio";
drive-strength = <2>;

--
b4 0.10.1