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[180.214.232.81]) by smtp.gmail.com with ESMTPSA id t2-20020a170902e84200b00185507b5ef8sm11589693plg.50.2022.11.16.00.47.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 00:47:55 -0800 (PST) Received: by debian.me (Postfix, from userid 1000) id 9C007103FF6; Wed, 16 Nov 2022 15:47:52 +0700 (WIB) Date: Wed, 16 Nov 2022 15:47:52 +0700 From: Bagas Sanjaya To: Jiucheng Xu Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Jonathan Corbet , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Shuai Xue , John Garry , Wan Jiabing , Chris Healy , Jianxin Pan , Kelvin Zhang , Chris Healy Subject: Re: [PATCH v10 1/2] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Message-ID: References: <20221116003133.1049346-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="rd8PJiydnsGM+b5x" Content-Disposition: inline In-Reply-To: <20221116003133.1049346-1-jiucheng.xu@amlogic.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --rd8PJiydnsGM+b5x Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 16, 2022 at 08:31:32AM +0800, Jiucheng Xu wrote: > This patch adds support Amlogic meson G12 series SoC > DDR bandwidth PMU driver framework and interfaces. >=20 > The PMU not only can monitor the total DDR bandwidth, > but also the bandwidth which is from individual IP module. >=20 Please write the patch description in imperative mood (no "This patch/commit does foo" but "Do foo" instead). What about this description below? ``` Add support for Amlogic Meson G12 Series SOC - DDR bandwidth PMU driver framework and interfaces. The PMU can not only monitor the total DDR bandwidth, but also individual IP module bandwidth. ``` > Example usage: >=20 > $ perf stat -a -e meson_ddr_bw/total_rw_bytes/ -I 1000 sleep 10 >=20 > - or - >=20 > $ perf stat -a -e \ > meson_ddr_bw/total_rw_bytes/,\ > meson_ddr_bw/chan_1_rw_bytes,arm=3D1/ -I 1000 \ > sleep 10 >=20 > g12 SoC support 4 channels to monitor DDR bandwidth > simultaneously. Each channel can monitor up to 4 IP modules > simultaneously. >=20 > For Instance, If you want to get the sum of DDR bandwidth > from CPU, GPU, USB3.0 and VDEC. You can use the following > command parameters to display. >=20 > $ perf stat -a -e \ > meson_ddr_bw/chan_2_rw_bytes,arm=3D1,gpu=3D1,usb3_0=3D1,nna=3D1/ -I 10= 00 \ > sleep 10 >=20 > Other events are supported, and advertised via perf list. The demo example should have been outside the patch description, though (more appropriate documentation as in patch [2/2]). Thanks. --=20 An old man doll... just what I always wanted! - Clara --rd8PJiydnsGM+b5x Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCY3SjsgAKCRD2uYlJVVFO o+XjAQDRA87SSby3+T5aH+WfpuopGJByRRFMiYzJCseiyFilngEAmlWqahhkpQR8 76Yig+rYcpJSwsnPILG8mXd9eIiXGAM= =CPHZ -----END PGP SIGNATURE----- --rd8PJiydnsGM+b5x--