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From: Conor Dooley <conor@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH] irqchip/sifive-plic: default to enabled
Date: Thu, 17 Nov 2022 19:57:17 +0000	[thread overview]
Message-ID: <Y3aSHUb8GHnso3Qb@spud> (raw)
In-Reply-To: <86y1s9nzja.wl-maz@kernel.org>

On Thu, Nov 17, 2022 at 07:36:57PM +0000, Marc Zyngier wrote:
> On Thu, 17 Nov 2022 18:59:43 +0000,
> Conor Dooley <conor@kernel.org> wrote:
> > 
> > From: Conor Dooley <conor.dooley@microchip.com>
> > 
> > The SiFive PLIC driver is used by all current implementations, including
> > those that do not have a SiFive PLIC. Default the driver to enabled,
> > with the intention of later removing the current "every SOC selects
> > this" situation in Kconfig.socs at the moment.
> > 
> > The speculative "potential others" in the description no longer makes
> > any sense, as the driver is always used. Update the Kconfig symbol's
> > description to reflect the driver's ubiquitous state.
> > 
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > Hey Marc,
> > 
> > I recall some discussion when this driver was extended to other PLICs a
> > few months ago:
> > https://lore.kernel.org/linux-riscv/20511a05f39408c8ffbcc98923c4abd2@kernel.org/
> > 
> > Perhaps I got the wrong impression, but it seemed to me that you intend
> > for future implementations to reuse this driver where possible?
> 
> Well, within reasons. People seem to have some very liberal
> interpretations of the architecture spec...

Yeah, I know.. something something "RISC-V is meant to be extensible"
something something. Even if that means doing some "standard" thing
your own way apparently.

> > I'd like to think, and surely will be proven wrong, that ~all future
> > plic implementations should be similar enough to fit that bill.
> > It's kinda on this basis that I figure switching this thing to default y
> > should be okay. It's already only buildable on RISC-V & every
> > implementation uses it, so no difference there.
> 
> If you expect this to be present at all times, why isn't this selected
> by the architecture Kconfig instead?

Everyone at the moment needs it, but that's not always going to be true.
The AIA APLIC that's currently out for review is the "next generation"
interrupt controller. When we will actually see one in the wild is
another question.

> I always find it pretty odd to
> have something that is 'default y' and yet constrained by a 'depend
> MYARCH'. A 'select PLIC' would make a lot more sense.
> 
> And then you can stop making this user selectable.

I was considering moving the select to arch level, but settled for this
as while I'd like to stop the individual SOCs doing `select PLIC`, I can
see why someone building for a (future) system with the new AIA stuff
may not care to build it.

Or maybe the overhead of this one driver is nothing to care about?

Thanks,
Conor.


  reply	other threads:[~2022-11-17 19:57 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-17 18:59 [PATCH] irqchip/sifive-plic: default to enabled Conor Dooley
2022-11-17 19:36 ` Marc Zyngier
2022-11-17 19:57   ` Conor Dooley [this message]
2022-11-17 20:26     ` Marc Zyngier

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