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[2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id f26-20020a17090631da00b007b27aefc578sm861531ejf.126.2022.11.17.14.00.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Nov 2022 14:00:30 -0800 (PST) Date: Thu, 17 Nov 2022 23:00:28 +0100 From: Thierry Reding To: Akhil R Cc: ldewangan@nvidia.com, jonathanh@nvidia.com, vkoul@kernel.org, p.zabel@pengutronix.de, dmaengine@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, sfr@canb.auug.org.au Subject: Re: [PATCH v4 2/3] arm64: tegra: Add dma-channel-mask in GPCDMA node Message-ID: References: <20221110171748.40304-1-akhilrajeev@nvidia.com> <20221110171748.40304-3-akhilrajeev@nvidia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="4NqMONeQWKrx0m0s" Content-Disposition: inline In-Reply-To: <20221110171748.40304-3-akhilrajeev@nvidia.com> User-Agent: Mutt/2.2.8 (2022-11-05) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --4NqMONeQWKrx0m0s Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Nov 10, 2022 at 10:47:47PM +0530, Akhil R wrote: > Add dma-channel-mask property in Tegra GPCDMA device tree node. >=20 > The property would help to specify the channels to be used in > kernel and reserve few for the firmware. This was previously > achieved by limiting the channel number to 31 in the driver. > This is wrong and does not align with the hardware. Correct this > and update the interrupts property to list all 32 interrupts. >=20 > Signed-off-by: Akhil R > --- > arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +++- > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 +++- > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 4 +++- > 3 files changed, 9 insertions(+), 3 deletions(-) Applied, thanks. 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