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Mon, 21 Nov 2022 12:25:13 -0800 (PST) Received: from linaro.org ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id r13-20020a056000014d00b0024165454262sm12119514wrx.11.2022.11.21.12.25.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Nov 2022 12:25:12 -0800 (PST) Date: Mon, 21 Nov 2022 22:25:11 +0200 From: Abel Vesa To: Dario Binacchi Cc: linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, michael@amarulasolutions.com, Abel Vesa , Anson Huang , Fabio Estevam , Michael Turquette , NXP Linux Team , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v2 5/5] clk: imx8mn: fix imx8mn_enet_phy_sels clocks list Message-ID: References: <20221117113637.1978703-1-dario.binacchi@amarulasolutions.com> <20221117113637.1978703-6-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221117113637.1978703-6-dario.binacchi@amarulasolutions.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22-11-17 12:36:37, Dario Binacchi wrote: > According to the "Clock Root" table of the reference manual (document > IMX8MNRM Rev 2, 07/2022): > > Clock Root offset Source Select (CCM_TARGET_ROOTn[MUX]) > ... ... ... > ENET_PHY_REF_CLK_ROOT 0xAA80 000 - 24M_REF_CLK > 001 - SYSTEM_PLL2_DIV20 > 010 - SYSTEM_PLL2_DIV8 > 011 - SYSTEM_PLL2_DIV5 > 100 - SYSTEM_PLL2_DIV2 > 101 - AUDIO_PLL1_CLK > 110 - VIDEO_PLL_CLK > 111 - AUDIO_PLL2_CLK > ... ... ... > > while the imx8mn_enet_phy_sels list didn't contained audio_pll1_out for > source select bits 101b. > > Fixes: 96d6392b54dbb ("clk: imx: Add support for i.MX8MN clock driver") > Signed-off-by: Dario Binacchi Reviewed-by: Abel Vesa > > --- > > (no changes since v1) > > drivers/clk/imx/clk-imx8mn.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c > index 37128c35198d..2afea905f7f3 100644 > --- a/drivers/clk/imx/clk-imx8mn.c > +++ b/drivers/clk/imx/clk-imx8mn.c > @@ -140,8 +140,8 @@ static const char * const imx8mn_enet_timer_sels[] = {"osc_24m", "sys_pll2_100m" > "clk_ext4", "video_pll_out", }; > > static const char * const imx8mn_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "sys_pll2_125m", > - "sys_pll2_200m", "sys_pll2_500m", "video_pll_out", > - "audio_pll2_out", }; > + "sys_pll2_200m", "sys_pll2_500m", "audio_pll1_out", > + "video_pll_out", "audio_pll2_out", }; > > static const char * const imx8mn_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out", > "sys_pll1_400m", "audio_pll2_out", "sys_pll3_out", > -- > 2.32.0 >