Re: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC

Conor Dooley
2022-11-18T11:38:33Z

On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
>
> This cache controller is also used on the StarFive JH7110 SoC.

"... and configured identically to that of the FU740"?
Anyways,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
> .../devicetree/bindings/riscv/sifive,ccache0.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> index bf3f07421f7e..262d1d49ce25 100644
> --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> @@ -25,6 +25,7 @@ select:
> - sifive,ccache0
> - sifive,fu540-c000-ccache
> - sifive,fu740-c000-ccache
> + - starfive,jh7110-ccache
>
> required:
> - compatible
> @@ -37,6 +38,7 @@ properties:
> - sifive,ccache0
> - sifive,fu540-c000-ccache
> - sifive,fu740-c000-ccache
> + - starfive,jh7110-ccache
> - const: cache
> - items:
> - const: microchip,mpfs-ccache
> @@ -86,6 +88,7 @@ allOf:
> enum:
> - sifive,fu740-c000-ccache
> - microchip,mpfs-ccache
> + - starfive,jh7110-ccache
>
> then:
> properties:
> @@ -105,7 +108,9 @@ allOf:
> properties:
> compatible:
> contains:
> - const: sifive,fu740-c000-ccache
> + enum:
> + - sifive,fu740-c000-ccache
> + - starfive,jh7110-ccache
>
> then:
> properties:
> --
> 2.38.1
>
>
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