From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1751C43217 for ; Thu, 1 Dec 2022 16:32:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232218AbiLAQcV (ORCPT ); Thu, 1 Dec 2022 11:32:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232216AbiLAQcT (ORCPT ); Thu, 1 Dec 2022 11:32:19 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 248DBA80B9 for ; Thu, 1 Dec 2022 08:32:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id CEF95B81F8B for ; Thu, 1 Dec 2022 16:32:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 650AAC433C1; Thu, 1 Dec 2022 16:32:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669912336; bh=cMwzrRKMQ2waFYK+vs1kMdLHyXhAlnzImiEEX0QXs4U=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CAaJawPCOdI05RzgTiR0YrbEamagB7IKEaOxAThb5E0xpyB9Qx4gsrfy/B+HXRGf1 vgmaeMrWxHnfNpNlXHWNxVD3OvrTiQZ5FhI67/74iHZeRHCqpBzQGTo3WugcIUjccH KjcP+6WA+VtYEx9WEAfklqX9x3iRj3BKHPBuQny7frB7NGMJCechNmm133FFRL1h+p Ri2YwgcOJWjJ0CA387ZFQo9xvNT/uJFpLQDLxG8FB8uIYnfX5nUxMvFSt/qNvbVO9A rpWYJfeiDZFGQAbi2Mn0l6tektcyc8fU+W2oE9skmJtyCmEcWp3IDCq4idJTlqUEkb u4nEbIdsVQYCA== Date: Fri, 2 Dec 2022 00:22:23 +0800 From: Jisheng Zhang To: Palmer Dabbelt Cc: guoren@kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] RISC-V: Align the shadow stack Message-ID: References: <20221130023515.20217-1-palmer@rivosinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20221130023515.20217-1-palmer@rivosinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 29, 2022 at 06:35:14PM -0800, Palmer Dabbelt wrote: > The standard RISC-V ABIs all require 16-byte stack alignment. We're > only calling that one function on the shadow stack so I doubt it'd > result in a real issue, but might as well keep this lined up. > > Fixes: 31da94c25aea ("riscv: add VMAP_STACK overflow detection") > Signed-off-by: Palmer Dabbelt Reviewed-by: Jisheng Zhang > --- > arch/riscv/kernel/traps.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c > index be54ccea8c47..acdfcacd7e57 100644 > --- a/arch/riscv/kernel/traps.c > +++ b/arch/riscv/kernel/traps.c > @@ -206,7 +206,7 @@ static DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], > * shadow stack, handled_ kernel_ stack_ overflow(in kernel/entry.S) is used > * to get per-cpu overflow stack(get_overflow_stack). > */ > -long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)]; > +long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)] __aligned(16); > asmlinkage unsigned long get_overflow_stack(void) > { > return (unsigned long)this_cpu_ptr(overflow_stack) + > -- > 2.38.1 >