[PATCH v1 3/7] dt-bindings: net: Add bindings for StarFive dwmac

Yanhong Wang
2022-12-01T09:02:18Z

Add bindings for the StarFive dwmac module on the StarFive RISC-V SoCs.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
---
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../bindings/net/starfive,dwmac-plat.yaml | 106 ++++++++++++++++++
MAINTAINERS | 5 +
3 files changed, 112 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index d8779d3de3d6..13c5928d7170 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -33,6 +33,7 @@ select:
- snps,dwmac-5.20
- snps,dwxgmac
- snps,dwxgmac-2.10
+ - starfive,dwmac

# Deprecated
- st,spear600-gmac
diff --git a/Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml b/Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml
new file mode 100644
index 000000000000..561cf2a713ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 StarFive Technology Co., Ltd.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/net/dwmac-starfive.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: StarFive DWMAC glue layer
+
+maintainers:
+ - Yanhong Wang <yanhong.wang@starfivetech.com>
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - starfive,dwmac
+ required:
+ - compatible
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - starfive,dwmac
+ - const: snps,dwmac-5.20
+
+ clocks:
+ items:
+ - description: GMAC main clock
+ - description: GMAC AHB clock
+ - description: PTP clock
+ - description: TX clock
+ - description: GTXC clock
+ - description: GTX clock
+
+ clock-names:
+ contains:
+ enum:
+ - stmmaceth
+ - pclk
+ - ptp_ref
+ - tx
+ - gtxc
+ - gtx
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/starfive-jh7110.h>
+ #include <dt-bindings/reset/starfive-jh7110.h>
+
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <4>;
+ snps,rd_osr_lmt = <4>;
+ snps,blen = <256 128 64 32 0 0 0>;
+ };
+
+ gmac0: ethernet@16030000 {
+ compatible = "starfive,dwmac", "snps,dwmac-5.20";
+ reg = <0x16030000 0x10000>;
+ clocks = <&aoncrg_clk JH7110_AONCLK_GMAC0_AXI>,
+ <&aoncrg_clk JH7110_AONCLK_GMAC0_AHB>,
+ <&syscrg_clk JH7110_SYSCLK_GMAC0_PTP>,
+ <&aoncrg_clk JH7110_AONCLK_GMAC0_TX>,
+ <&syscrg_clk JH7110_SYSCLK_GMAC0_GTXC>,
+ <&syscrg_clk JH7110_SYSCLK_GMAC0_GTXCLK>;
+ clock-names = "stmmaceth",
+ "pclk",
+ "ptp_ref",
+ "tx",
+ "gtxc",
+ "gtx";
+ resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
+ <&aoncrg JH7110_AONRST_GMAC0_AHB>;
+ reset-names = "stmmaceth", "ahb";
+ interrupts = <7>, <6>, <5>;
+ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+ phy-mode = "rgmii-id";
+ snps,multicast-filter-bins = <64>;
+ snps,perfect-filter-entries = <8>;
+ rx-fifo-depth = <2048>;
+ tx-fifo-depth = <2048>;
+ snps,fixed-burst;
+ snps,no-pbl-x8;
+ snps,force_thresh_dma_mode;
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,tso;
+ snps,en-tx-lpi-clockgating;
+ snps,lpi_en;
+ snps,txpbl = <16>;
+ snps,rxpbl = <16>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index a70c1d0f303e..7eaaec8d3b96 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19606,6 +19606,11 @@ F: Documentation/devicetree/bindings/clock/starfive*
F: drivers/clk/starfive/
F: include/dt-bindings/clock/starfive*

+STARFIVE DWMAC GLUE LAYER
+M: Yanhong Wang <yanhong.wang@starfivetech.com>
+S: Maintained
+F: Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml
+
STARFIVE PINCTRL DRIVER
M: Emil Renner Berthing <kernel@esmil.dk>
M: Jianlong Huang <jianlong.huang@starfivetech.com>
--
2.17.1