Re: PXA25x: GPIO driver fails probe due to resource conflict with pinctrl driver

Robert Jarzmik
2022-12-08T19:05:09Z

Jonathan Neuschäfer <j.neuschaefer@gmx.net> writes:

> Without further code changes this wouldn't be sufficient,
> because the
> pinctrl driver also touches the GPIO direction registers at
> offset
> 0x0c-0x14.

Historically, this problem was adressed by a "hack" if I remember
correctly, as the
registers do overlap (on pxa27x at least, but I think on pxa25x as
well) :
- GAFR (alternate functions) and GPDR (input or output) are
"pinctrl"
- GPSR, GPCR, GPLR are "gpio" registers
- the memory map (physical) at 0x40e0 0000 is as Jonathan wrote :
- 3 u32 GPLR (gpio)
- 3 u32 GPDR (pinctrl)
- 3 u32 GPSR (gpio)
- 3 u32 GPCR (gpio)

The "hack" was that one driver was mapping the area _without_
claiming it (this
is part from memory, I didn't check in the code today). The gpio
was probably
the claiming one, while the pinctrl was the "only using one".

As of today, I should have a look what was changed, but I'm pretty
sure in all
pxa2xx architecture there is an overlap, as for these ancient
platforms the
pinctrl wasn't yet separated from the gpio IC.

The only was out so far I can see from my head would be to declare
multiple
very small IO ranges :
- pinctrl pxa25x : 0x40e0 000c (12 bytes), 0x40e0 0054 (32 bytes)
- pinctrl pxa25x : 0x40e0 000c (12 bytes), 0x40e0 0054 (32 bytes),
0x40e0 010c (4 bytes)
- gpio : from 0x40e0 0000 to 0x40e0 0070 included, without the
pinctrl ones

As a general guide, in gpio-pxa.c, you have the table in
[1]. Think GPDR and GAFR as
pinctrl, and all the other ones as gpio. Ah and yes, the GAFR ones
are missing in this
table.

One last think : in a pre device-tree world, when we didn't had
yet the pxa pinctrl
driver, the gpio driver was directly playing with the GPDR
registers, fun old times.

Cheers.

--
Robert

[1]
/*
* We handle the GPIOs by banks, each bank covers up to 32 GPIOs
with
* one set of registers. The register offsets are organized below:
*
* GPLR GPDR GPSR GPCR GRER GFER GEDR
* BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
* BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
* BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
*
* BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
* BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
* BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
*
* BANK 6 - 0x0200 0x020C 0x0218 0x0224 0x0230 0x023C 0x0248
*
* NOTE:
* BANK 3 is only available on PXA27x and later processors.
* BANK 4 and 5 are only available on PXA935, PXA1928
* BANK 6 is only available on PXA1928
*/