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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id l12-20020a170902e2cc00b00176a6ba5969sm9370997plc.98.2022.12.07.16.18.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 16:18:10 -0800 (PST) Date: Thu, 8 Dec 2022 00:18:07 +0000 From: Sean Christopherson To: Oliver Upton Cc: Marc Zyngier , James Morse , Alexandru Elisei , Paolo Bonzini , Shuah Khan , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kvmarm@lists.linux.dev, Ricardo Koller , linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/4] KVM: arm64: selftests: Align VA space allocator with TTBR0 Message-ID: References: <20221207214809.489070-1-oliver.upton@linux.dev> <20221207214809.489070-4-oliver.upton@linux.dev> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221207214809.489070-4-oliver.upton@linux.dev> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 07, 2022, Oliver Upton wrote: > diff --git a/tools/testing/selftests/kvm/lib/aarch64/processor.c b/tools/testing/selftests/kvm/lib/aarch64/processor.c > index 316de70db91d..5972a23b2765 100644 > --- a/tools/testing/selftests/kvm/lib/aarch64/processor.c > +++ b/tools/testing/selftests/kvm/lib/aarch64/processor.c > @@ -541,3 +541,13 @@ void kvm_selftest_arch_init(void) > */ > guest_modes_append_default(); > } > + > +void vm_vaddr_populate_bitmap(struct kvm_vm *vm) Add "arch" so that it's obvious this can be overidden? The "__weak" conveys that for the implementation, but not for the call site. E.g. vm_arch_vaddr_populate_bitmap(). Actually, IIUC, the issue is that the high half isn't mapped (probably the wrong terminology). I.e. the calculation for the low half stays the same, and the high half just goes away. > +{ > + /* > + * arm64 selftests use only TTBR0_EL1, meaning that the valid VA space > + * is [0, 2^(64 - TCR_EL1.T0SZ)). > + */ > + sparsebit_set_num(vm->vpages_valid, 0, > + (1ULL << vm->va_bits) >> vm->page_shift); > +} > diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c > index e9607eb089be..c88c3ace16d2 100644 > --- a/tools/testing/selftests/kvm/lib/kvm_util.c > +++ b/tools/testing/selftests/kvm/lib/kvm_util.c > @@ -186,6 +186,15 @@ const struct vm_guest_mode_params vm_guest_mode_params[] = { > _Static_assert(sizeof(vm_guest_mode_params)/sizeof(struct vm_guest_mode_params) == NUM_VM_MODES, > "Missing new mode params?"); > > +__weak void vm_vaddr_populate_bitmap(struct kvm_vm *vm) > +{ > + sparsebit_set_num(vm->vpages_valid, > + 0, (1ULL << (vm->va_bits - 1)) >> vm->page_shift); > + sparsebit_set_num(vm->vpages_valid, > + (~((1ULL << (vm->va_bits - 1)) - 1)) >> vm->page_shift, > + (1ULL << (vm->va_bits - 1)) >> vm->page_shift); Any objection to fixing up the formatting? Actually, we can do more than just fix the indentation, e.g. the number of bits is identical, and documenting that this does a high/low split would be helpful. Together, what about? The #ifdef is a bit gross, especially around "hi_start", but it's less duplicate code. And IMO, having things bundled in the same place makes it a lot easier for newbies (to arm64 or kernel coding in general) to understand what's going on and why arm64 is different. --- tools/testing/selftests/kvm/lib/kvm_util.c | 23 +++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c index e9607eb089be..d6f2c17e3d40 100644 --- a/tools/testing/selftests/kvm/lib/kvm_util.c +++ b/tools/testing/selftests/kvm/lib/kvm_util.c @@ -186,6 +186,23 @@ const struct vm_guest_mode_params vm_guest_mode_params[] = { _Static_assert(sizeof(vm_guest_mode_params)/sizeof(struct vm_guest_mode_params) == NUM_VM_MODES, "Missing new mode params?"); +static void vm_vaddr_populate_bitmap(struct kvm_vm *vm) +{ + /* + * All architectures supports splitting the virtual address space into + * a high and a low half. Populate both halves, except for arm64 which + * currently uses only TTBR0_EL1 (arbitrary selftests "logic"), i.e. + * only has a valid low half. + */ + sparsebit_num_t nr_va_bits = (1ULL << (vm->va_bits - 1)) >> vm->page_shift; +#ifndef __aarch64__ + sparsebit_num_t hi_start = (~((1ULL << (vm->va_bits - 1)) - 1)) >> vm->page_shift + + sparsebit_set_num(vm->vpages_valid, hi_start, nr_bits); +#endif + sparsebit_set_num(vm->vpages_valid, 0, nr_va_bits); +} + struct kvm_vm *____vm_create(enum vm_guest_mode mode) { struct kvm_vm *vm; @@ -274,11 +291,7 @@ struct kvm_vm *____vm_create(enum vm_guest_mode mode) /* Limit to VA-bit canonical virtual addresses. */ vm->vpages_valid = sparsebit_alloc(); - sparsebit_set_num(vm->vpages_valid, - 0, (1ULL << (vm->va_bits - 1)) >> vm->page_shift); - sparsebit_set_num(vm->vpages_valid, - (~((1ULL << (vm->va_bits - 1)) - 1)) >> vm->page_shift, - (1ULL << (vm->va_bits - 1)) >> vm->page_shift); + vm_vaddr_populate_bitmap(vm); /* Limit physical addresses to PA-bits. */ vm->max_gfn = vm_compute_max_gfn(vm); base-commit: 35aecc3289eebf193fd70a067ea448ae2f0bb9b9 --