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[34.70.23.30]) by smtp.gmail.com with UTF8SMTPSA id ca6-20020a0566381c0600b0038a6d03db70sm1957617jab.34.2022.12.08.15.39.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Dec 2022 15:39:45 -0800 (PST) Date: Thu, 8 Dec 2022 23:39:45 +0000 From: Matthias Kaehlcke To: Douglas Anderson Cc: Bjorn Andersson , Dmitry Torokhov , swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, Yunlong Jia , Konrad Dybcio , Johnny Chuang , linux-kernel@vger.kernel.org Subject: Re: [PATCH 5/5] Input: elants_i2c: Delay longer with reset asserted Message-ID: References: <20221208192006.1070898-1-dianders@chromium.org> <20221208111910.5.I6edfb3f459662c041563a54e5b7df727c27caaba@changeid> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20221208111910.5.I6edfb3f459662c041563a54e5b7df727c27caaba@changeid> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Dec 08, 2022 at 11:20:06AM -0800, Douglas Anderson wrote: > The elan touchscreen datasheet says that the reset GPIO only needs to > be asserted for 500us in order to reset the regulator. The problem is > that some boards need a level shifter between the signals on the GPIO > controller and the signals on the touchscreen. All of these extra > components on the line can slow the transition of the signals. On one > board, we measured the reset line and saw that it took almost 1.8ms to > go low. Even after we bumped up the "drive strength" of the signal > from the default 2mA to 8mA we still saw it take 421us for the signal > to go low. > > In order to account for this we let's lengthen the amount of time that nit: s/we let's/we/ || s/we let's/let's/ no need to re-spin just for this > we keep the reset asserted. Let's bump it up from 500us to 5000us. > That's still a relatively short amount of time and is much safer. > > It should be noted that this fixes real problems. Case in point: > 1. The touchscreen power rail may be shared with another device (like > an eDP panel). That means that at probe time power might already be > on. > 2. In probe we grab the reset GPIO and assert it (make it low). > 3. We turn on power (a noop since it was already on). > 4. We wait 500us. > 5. We deassert the reset GPIO. > > With the above case and only a 500us delay we saw only a partial reset > asserted, which is bad. Giving it 5ms is overkill but feels safer in > case someone else has a different level shifter setup. > > Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke