Re: [PATCH 3/4] arm64: dts: qcom: sa8540p-ride: add qup1_i2c15 and qup2_i2c18 nodes

Brian Masney
2022-12-14T12:33:37Z

On Tue, Dec 13, 2022 at 03:48:27PM +0100, Konrad Dybcio wrote:
> > + qup1_i2c15_default: qup1-i2c15-state {
> > + mux-pins {
> > + pins = "gpio36", "gpio37";
> > + function = "qup15";
> > + };
> > +
> > + config-pins {
> > + pins = "gpio36", "gpio37";
> > + drive-strength = <0x02>;
> > + bias-pull-up;
> > + };
> > + };
>
> You can drop mux/config-pins and have the pin properties live directly
> under the qup1-i2cN-state node.

Hi Konrad (and Shazad below),

I need to enable 5 i2c buses (0, 1, 12, 15, 18) on this board. I tried
the following combinations with the pin mapping configuration and the
only one that seems to work reliably for me is what I originally had.

With the following, only 2 out of the 5 buses are detected. There's no
i2c mesages in dmesg.

i2c0_default: i2c0-default-state {
pins = "gpio135", "gpio136";
function = "qup15";
};

Next, I added a drive-strength and bias-pull-up. All 5 buses are
detected. One bus throws read errors when I probe it with i2cdetect, two
others 'i2cdetect -a -y $BUSNUM' takes ~5 seconds to run, and the
remaining two are fast.

i2c0_default: i2c0-default-state {
pins = "gpio135", "gpio136";
function = "qup15";
drive-strength = <2>;
bias-pull-up;
};

This is the style where i2cdetect seems to be happy for all 5 buses and
is fast:

i2c0_default: i2c0-default-state {
mux-pins {
pins = "gpio135", "gpio136";
function = "qup0";
};

config-pins {
pins = "gpio135", "gpio136";
drive-strength = <2>;
bias-pull-up;
};
};

Shazad: 'i2cdetect -a -y $BUSNUM) shows that all 5 buses have the same
addresses listening. Is that expected? That seems a bit odd to me.

[root@localhost ~]# i2cdetect -a -y 0
Warning: Can't use SMBus Quick Write command, will skip some addresses
0 1 2 3 4 5 6 7 8 9 a b c d e f
00:
10:
20:
30: -- -- -- -- -- -- -- --
40:
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60:
70:

I triple checked that I have the QUP pins defined correctly for the 5
buses. I checked them against what's in the downstream kernel and I also
checked them against what's in upstream's
drivers/pinctrl/qcom/pinctrl-sc8280xp.c. This is the pin mapping that I
have:

i2c0: gpio135, gpio136
i2c1: gpio158, gpio159
i2c12: gpio0, gpio1
i2c15: gpio36, gpio37
i2c18: gpio66, gpio67

Brian