Re: [PATCH v2 1/7] arm64: dts: qcom: sm8450: add spmi node

[Vinod Koul <vkoul@kernel.org>]

On 29-12-22, 10:12, Bjorn Andersson wrote:
> On Thu, Dec 29, 2022 at 11:57:58AM +0100, Krzysztof Kozlowski wrote:
> > On 29/12/2022 11:45, Konrad Dybcio wrote:
> > > 
> > > 
> > > On 29.12.2022 11:42, Krzysztof Kozlowski wrote:
> > >> On 29/12/2022 11:32, Konrad Dybcio wrote:
> > >>> From: Vinod Koul <vkoul@kernel.org>
> > >>>
> > >>> Add the spmi bus as found in the SM8450 SoC
> > >>>
> > >>> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > >>> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> > >>> [Konrad: 0x0 -> 0, move #cells down, make reg-names a vertical list]
> > >>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> > >>> ---
> > >>> v1 -> v2:
> > >>> No changes
> > >>>
> > >>>  arch/arm64/boot/dts/qcom/sm8450.dtsi | 22 ++++++++++++++++++++++
> > >>>  1 file changed, 22 insertions(+)
> > >>>
> > >>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > >>> index 570475040d95..b9b59c5223eb 100644
> > >>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > >>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > >>> @@ -2715,6 +2715,28 @@ aoss_qmp: power-controller@c300000 {
> > >>>  			#clock-cells = <0>;
> > >>>  		};
> > >>>  
> > >>> +		spmi_bus: spmi@c42d000 {
> > >>
> > >> Hmm looks different than reg.
> > >>
> > >>> +			compatible = "qcom,spmi-pmic-arb";
> > >>> +			reg = <0 0x0c400000 0 0x00003000>,
> > >>> +			      <0 0x0c500000 0 0x00400000>,
> > >>> +			      <0 0x0c440000 0 0x00080000>,
> > >>> +			      <0 0x0c4c0000 0 0x00010000>,
> > >>> +			      <0 0x0c42d000 0 0x00010000>;
> > >> x
> > > Hm, my guess would be that Vinod chose to put the "cnfg" reg
> > > instead of "core" in the unit address, as 8450 has 2 SPMI bus
> > > hosts and they both share the core reg, so it would have been
> > > impossible to have two spmi@core nodes..
> > 
> > Eh? SM8450 has 2 SPMI hosts both using 0x0c400000? How does that work?
> > Usually address can be mapped only once.
> > 
> 
> The SPMI controller does something like multi-master. The driver expects
> the same region to be mapped multiple times and qcom,channel is used to
> select which one each instance should operate on.

Right, this one adds same as downstream. I agree in future we should
revisit this and decide how we should model this. For now I am more
inclined to get this piece closed, it been more than a year :-( lets not
make it two!

-- 
~Vinod