* [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for PADCFG2
@ 2022-12-19 12:32 Andy Shevchenko
2022-12-19 14:34 ` Mika Westerberg
0 siblings, 1 reply; 4+ messages in thread
From: Andy Shevchenko @ 2022-12-19 12:32 UTC (permalink / raw)
To: Andy Shevchenko, linux-gpio, linux-kernel
Cc: Mika Westerberg, Andy Shevchenko, Linus Walleij
PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same
for PADCFG2 bit fields.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-intel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 5e21b0a96efe..9d2791a81ffa 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -88,9 +88,9 @@
#define PADCFG1_TERM_800 (BIT(2) | BIT(1) | BIT(0))
#define PADCFG2 0x008
-#define PADCFG2_DEBEN BIT(0)
#define PADCFG2_DEBOUNCE_SHIFT 1
#define PADCFG2_DEBOUNCE_MASK GENMASK(4, 1)
+#define PADCFG2_DEBEN BIT(0)
#define DEBOUNCE_PERIOD_NSEC 31250
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for PADCFG2
2022-12-19 12:32 [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for PADCFG2 Andy Shevchenko
@ 2022-12-19 14:34 ` Mika Westerberg
2022-12-19 14:39 ` Andy Shevchenko
2022-12-27 19:25 ` Andy Shevchenko
0 siblings, 2 replies; 4+ messages in thread
From: Mika Westerberg @ 2022-12-19 14:34 UTC (permalink / raw)
To: Andy Shevchenko; +Cc: linux-gpio, linux-kernel, Andy Shevchenko, Linus Walleij
On Mon, Dec 19, 2022 at 02:32:29PM +0200, Andy Shevchenko wrote:
> PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same
> for PADCFG2 bit fields.
Perhaps:
No functional changes.
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for PADCFG2
2022-12-19 14:34 ` Mika Westerberg
@ 2022-12-19 14:39 ` Andy Shevchenko
2022-12-27 19:25 ` Andy Shevchenko
1 sibling, 0 replies; 4+ messages in thread
From: Andy Shevchenko @ 2022-12-19 14:39 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-gpio, linux-kernel, Linus Walleij
On Mon, Dec 19, 2022 at 04:34:35PM +0200, Mika Westerberg wrote:
> On Mon, Dec 19, 2022 at 02:32:29PM +0200, Andy Shevchenko wrote:
> > PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same
> > for PADCFG2 bit fields.
>
> Perhaps:
>
> No functional changes.
Sure.
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Thank you!
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for PADCFG2
2022-12-19 14:34 ` Mika Westerberg
2022-12-19 14:39 ` Andy Shevchenko
@ 2022-12-27 19:25 ` Andy Shevchenko
1 sibling, 0 replies; 4+ messages in thread
From: Andy Shevchenko @ 2022-12-27 19:25 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-gpio, linux-kernel, Linus Walleij
On Mon, Dec 19, 2022 at 04:34:35PM +0200, Mika Westerberg wrote:
> On Mon, Dec 19, 2022 at 02:32:29PM +0200, Andy Shevchenko wrote:
> > PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same
> > for PADCFG2 bit fields.
>
> Perhaps:
>
> No functional changes.
>
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Pushed to my review and testing queue, thanks!
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-12-19 12:32 [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for PADCFG2 Andy Shevchenko
2022-12-19 14:34 ` Mika Westerberg
2022-12-19 14:39 ` Andy Shevchenko
2022-12-27 19:25 ` Andy Shevchenko
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