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Date:   Wed, 18 Jan 2023 22:45:44 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Sinthu Raja <sinthu.raja@mistralsolutions.com>
Cc:     Roger Quadros <rogerq@kernel.org>,
        Ravi Gunasekaran <r-gunasekaran@ti.com>,
        Siddharth Vadapalli <s-vadapalli@ti.com>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
        Sinthu Raja <sinthu.raja@ti.com>
Subject: Re: [PATCH V4 0/2] phy: ti: j721e-wiz: Add support to manage type-C
 swap on Lane2 and lane3
Message-ID: <Y8gpQExHEVPe0g9j@matsya>
References: <20230113150615.19375-1-sinthu.raja@ti.com>
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On 13-01-23, 20:36, Sinthu Raja wrote:
> From: Sinthu Raja <sinthu.raja@ti.com>
> 
> Hi All,
> This series of patch add support to enable lanes 2 and 3 swap by
> configuring the LN23 bit of the SerDes WIZ control register. Also,
> it's possible that the Type-C plug orientation on the DIR line will
> be implemented through hardware design. In that situation, there
> won't be an external GPIO line available, but the driver still needs
> to address this since the DT won't use the typec-dir-gpios property.
> Update code to handle if typec-dir-gpios property is not specified in DT.

Applied, thanks

-- 
~Vinod