From: Conor Dooley <conor.dooley@microchip.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: <linux-riscv@lists.infradead.org>,
Palmer Dabbelt <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
<conor@kernel.org>, <corbet@lwn.net>, <guoren@kernel.org>,
<heiko@sntech.de>, <paul.walmsley@sifive.com>,
<linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>,
Heiko Stuebner <heiko.stuebner@vrull.eu>
Subject: Re: [PATCH v2 2/3] RISC-V: resort all extensions in consistent orders
Date: Fri, 20 Jan 2023 14:16:48 +0000 [thread overview]
Message-ID: <Y8qiUCH6ERYmAdgg@wendy> (raw)
In-Reply-To: <20230120135632.vb7ncvoapnaixluu@orel>
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On Fri, Jan 20, 2023 at 02:56:32PM +0100, Andrew Jones wrote:
> Hi Conor,
>
> I'm digging this back up because I'm basing Zicboz on it.
>
> If we take "riscv: improve boot time isa extensions handling", then this
> becomes a bunch of manually enumerated defines
>
> #define RISCV_ISA_EXT_SSCOFPMF 26
> #define RISCV_ISA_EXT_SVPBMT 27
> #define RISCV_ISA_EXT_ZICBOM 28
> #define RISCV_ISA_EXT_ZIHINTPAUSE 29
> #define RISCV_ISA_EXT_SSTC 30
> #define RISCV_ISA_EXT_SVINVAL 31
>
> Keeping those in alphabetical order would either require manually
> reenumerating them or to allow the numbers to be out of order as
> we add more extensions. I think I'd prefer we just add new
> extensions at the bottom and keep the numbers in order.
Yes. I mentioned that on one of the earlier versions of Jisheng's
patchset - initially I blindly said "alphabetical please".
I quickly realised that that was a really stupid idea as it is would
just be an _invitiation_ for bugs if we did, since names are far more
easily searchable than figuring out the max in the manual enumeration.
Since Jisheng's patchset just deleted what I had resorted, I left this
change as-was. Just need to make sure any comment about ordering also
gets removed when the enum goes away.
I'll keep an eye on for-next to make sure that it does.
TL;DR I agree!
Thanks,
Conor.
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next prev parent reply other threads:[~2023-01-20 14:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-05 14:45 [PATCH v2 0/3] Putting some basic order on isa extension lists Conor Dooley
2022-12-05 14:45 ` [PATCH v2 1/3] RISC-V: clarify ISA string ordering rules in cpu.c Conor Dooley
2022-12-05 14:45 ` [PATCH v2 2/3] RISC-V: resort all extensions in consistent orders Conor Dooley
2023-01-20 13:56 ` Andrew Jones
2023-01-20 14:16 ` Conor Dooley [this message]
2022-12-05 14:45 ` [PATCH v2 3/3] Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo Conor Dooley
2023-01-25 3:50 ` [PATCH v2 0/3] Putting some basic order on isa extension lists patchwork-bot+linux-riscv
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