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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id w15-20020a1709026f0f00b0019460ac7c6asm3871334plk.283.2023.01.20.09.32.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:32:25 -0800 (PST) Date: Fri, 20 Jan 2023 17:32:21 +0000 From: Sean Christopherson To: "Liang, Kan" Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , "H. Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Jianfeng Gao , Andrew Cooper , Andi Kleen Subject: Re: [PATCH] perf/x86: KVM: Disable vPMU support on hybrid CPUs (host PMUs) Message-ID: References: <20230120004051.2043777-1-seanjc@google.com> <1dec071d-c010-cd89-9e58-d643e71e775c@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1dec071d-c010-cd89-9e58-d643e71e775c@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 20, 2023, Liang, Kan wrote: > > On 2023-01-19 7:40 p.m., Sean Christopherson wrote: > > Disable KVM support for virtualizing PMUs on hosts with hybrid PMUs until > > KVM gains a sane way to enumeration the hybrid vPMU to userspace and/or > > gains a mechanism to let userspace opt-in to the dangers of exposing a > > hybrid vPMU to KVM guests. > > > > Virtualizing a hybrid PMU, or at least part of a hybrid PMU, is possible, > > but it requires userspace to pin vCPUs to pCPUs to prevent migrating a > > vCPU between a big core and a little core, requires the VMM to accurately > > enumerate the topology to the guest (if exposing a hybrid CPU to the > > guest), and also requires the VMM to accurately enumerate the vPMU > > capabilities to the guest. > > Current kernel only return the common counters to KVM, which is > available on both e-core and p-core. In theory, there should be no > problem with the migration between cores. You don't have to pin vCPU. > The only problem is that you probably can only use the architecture events. And how exactly is KVM supposed to tell the guest that it can only use architectural events? I see CPUID bits that enumerate which architectural events are supported, but I'm not seeing anything that says _only_ architectural events are supported. > There is nothing wrong for the information provided by the kernel. I > think it should be a KVM issue (my guess is the CPUID enumeration.) we > should fix rather than simply disable the PMU for entire hybrid machines. I'm not arguing this isn't KVM's problem, and I'm all for proper enabling in KVM, but I'm not seeing any patches being posted. In the meantime, we've got bug reports coming in about KVM guests having PMU problems on hybrid hosts, and a pile of evidence that strongly suggests this isn't going to be fixed by a one-line patch. Again, I'm not against enabling vPMU on hybrid CPUs, but AFAICT the enabling is non-trivial and may require new uAPI to provide the necessary information to userspace. As a short term fix, and something that can be backported to stable trees, I don't see a better alternative than disabling vPMU support.