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Thu, 26 Jan 2023 10:50:36 -0800 (PST) Received: from linaro.org ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id r25-20020adfa159000000b00297dcfdc90fsm2049532wrr.24.2023.01.26.10.50.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Jan 2023 10:50:36 -0800 (PST) Date: Thu, 26 Jan 2023 20:50:34 +0200 From: Abel Vesa To: Konrad Dybcio Cc: Andy Gross , Bjorn Andersson , Sai Prakash Ranjan , Johan Hovold , linux-arm-msm@vger.kernel.org, Linux Kernel Mailing List Subject: Re: [PATCH] soc: qcom: llcc: Fix slice configuration values for SC8280XP Message-ID: References: <20230126171636.2319496-1-abel.vesa@linaro.org> <09bf9907-27b9-146f-4a94-dcab51350d5a@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <09bf9907-27b9-146f-4a94-dcab51350d5a@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23-01-26 18:25:52, Konrad Dybcio wrote: > > > On 26.01.2023 18:16, Abel Vesa wrote: > > The new values have been taken from downstream kernel. > > > > Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations") > > Signed-off-by: Abel Vesa > > --- > > drivers/soc/qcom/llcc-qcom.c | 10 +++++----- > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > > index 23ce2f78c4ed..5702354fb946 100644 > > --- a/drivers/soc/qcom/llcc-qcom.c > > +++ b/drivers/soc/qcom/llcc-qcom.c > > @@ -183,17 +183,17 @@ static const struct llcc_slice_config sc8280xp_data[] = { > > { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, > > { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, > > { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > - { LLCC_GPU, 12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 }, > > + { LLCC_GPU, 12, 4608, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 }, > priority (the arg right after 4608) should be 0 per downstream Actually according to Sai's review [1], I need to revert this part. > > > > { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, > > { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > { LLCC_AUDHW, 22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > { LLCC_DRE, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 }, > > - { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, > > - { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > - { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > - { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, > > + { LLCC_WRCACHE, 31, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, Same goes for this line above. > > + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > > + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, As for these 3 slice_ids, I need to doable check. > CMPT1 (id 34) is still missing. And Sai also says that CAMEXP0 (the upstream name of CMPT1) needs to be dropped. > > With that: > Reviewed-by: Konrad Dybcio > > Konrad > > }; > > > > static const struct llcc_slice_config sdm845_data[] = { [1] https://lore.kernel.org/lkml/8a627cc0-8f9b-0bda-c9b5-6d51a788948a@quicinc.com/