From: Greg KH <gregkh@linuxfoundation.org>
To: Yicong Yang <yangyicong@hisilicon.com>
Cc: alexander.shishkin@linux.intel.com, helgaas@kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
lorenzo.pieralisi@arm.com, jonathan.cameron@huawei.com,
song.bao.hua@hisilicon.com, prime.zeng@huawei.com,
linux-doc@vger.kernel.org, linuxarm@huawei.com,
"liuqi (BA)" <liuqi115@huawei.com>
Subject: Re: [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device
Date: Wed, 7 Apr 2021 12:25:29 +0200 [thread overview]
Message-ID: <YG2Imet/tbyzYcOo@kroah.com> (raw)
In-Reply-To: <01b6e8f7-3282-514e-818d-0e768dcc5ba3@hisilicon.com>
On Wed, Apr 07, 2021 at 06:03:11PM +0800, Yicong Yang wrote:
> On 2021/4/6 21:49, Greg KH wrote:
> > On Tue, Apr 06, 2021 at 08:45:50PM +0800, Yicong Yang wrote:
> >> HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex
> >> integrated Endpoint(RCiEP) device, providing the capability
> >> to dynamically monitor and tune the PCIe traffic(tune),
> >> and trace the TLP headers(trace). The driver exposes the user
> >> interface through debugfs, so no need for extra user space tools.
> >> The usage is described in the document.
> >
> > Why use debugfs and not the existing perf tools for debugging?
> >
>
> The perf doesn't match our device as we've analyzed.
>
> For the tune function it doesn't do the sampling at all.
> User specifys one link parameter and reads its current value or set
> the desired one. The process is static. We didn't find a
> way to adapt to perf.
>
> For the trace function, we may barely adapt to the perf framework
> but it doesn't seems like a better choice. We have our own format
> of data and don't need perf doing the parsing, and we'll get extra
> information added by perf as well. The settings through perf tools
> won't satisfy our needs, we cannot present available settings
> (filter BDF number, TLP types, buffer controls) to
> the user and user cannot set in a friendly way. For example,
> we cannot count on perf to decode the usual format BDF number like
> <domain>:<bus>:<dev>.<fn>, which user can use filter the TLP
> headers.
Please work with the perf developers to come up with a solution. I find
it hard to believe that your hardware is so different than all the other
hardware that perf currently supports. I would need their agreement
that you can not use perf before accepting this patchset.
thanks,
greg k-h
next prev parent reply other threads:[~2021-04-07 10:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-06 12:45 [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device Yicong Yang
2021-04-06 12:45 ` [PATCH 1/4] hwtracing: Add trace function " Yicong Yang
2021-04-06 13:51 ` Greg KH
2021-04-06 16:14 ` kernel test robot
2021-04-06 22:48 ` kernel test robot
2021-04-06 12:45 ` [PATCH 2/4] hwtracing: Add tune " Yicong Yang
2021-04-06 12:45 ` [PATCH 3/4] docs: Add documentation for HiSilicon PTT device driver Yicong Yang
2021-04-07 18:55 ` Bjorn Helgaas
2021-04-08 13:22 ` Yicong Yang
2021-04-08 16:57 ` Bjorn Helgaas
2021-04-09 14:09 ` Yicong Yang
2021-04-06 12:45 ` [PATCH 4/4] MAINTAINERS: Add maintainer for HiSilicon PTT driver Yicong Yang
2021-04-06 13:49 ` [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device Greg KH
2021-04-07 10:03 ` Yicong Yang
2021-04-07 10:25 ` Greg KH [this message]
2021-04-08 13:25 ` Yicong Yang
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