From: Peter Zijlstra <peterz@infradead.org>
To: Borislav Petkov <bp@alien8.de>
Cc: X86 ML <x86@kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86/asm: Simplify __smp_mb() definition
Date: Wed, 12 May 2021 11:50:05 +0200 [thread overview]
Message-ID: <YJukzRPyN7XbLlTd@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20210512093310.5635-1-bp@alien8.de>
On Wed, May 12, 2021 at 11:33:10AM +0200, Borislav Petkov wrote:
> From: Borislav Petkov <bp@suse.de>
>
> Drop the bitness ifdeffery in favor of using the rSP register
> specification for 32 and 64 bit depending on the build.
>
> No functional changes.
>
> Signed-off-by: Borislav Petkov <bp@suse.de>
> ---
> arch/x86/include/asm/barrier.h | 7 ++-----
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
> index 4819d5e5a335..3ba772a69cc8 100644
> --- a/arch/x86/include/asm/barrier.h
> +++ b/arch/x86/include/asm/barrier.h
> @@ -54,11 +54,8 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
> #define dma_rmb() barrier()
> #define dma_wmb() barrier()
>
> -#ifdef CONFIG_X86_32
> -#define __smp_mb() asm volatile("lock; addl $0,-4(%%esp)" ::: "memory", "cc")
> -#else
> -#define __smp_mb() asm volatile("lock; addl $0,-4(%%rsp)" ::: "memory", "cc")
> -#endif
> +#define __smp_mb() asm volatile("lock; addl $0,-4(%%" _ASM_SP ")" ::: "memory", "cc")
> +
> #define __smp_rmb() dma_rmb()
> #define __smp_wmb() barrier()
> #define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
next prev parent reply other threads:[~2021-05-12 9:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-12 9:33 [PATCH] x86/asm: Simplify __smp_mb() definition Borislav Petkov
2021-05-12 9:50 ` Peter Zijlstra [this message]
2021-05-12 11:16 ` [tip: x86/cleanups] " tip-bot2 for Borislav Petkov
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