From: Andrew Lunn <andrew@lunn.ch>
To: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/1] net: stmmac: enable platform specific safety features
Date: Wed, 2 Jun 2021 04:28:17 +0200 [thread overview]
Message-ID: <YLbswWVdgGgAKpwo@lunn.ch> (raw)
In-Reply-To: <20210601225332.GA28151@linux.intel.com>
On Wed, Jun 02, 2021 at 06:53:32AM +0800, Wong Vee Khee wrote:
> On Wed, Jun 02, 2021 at 12:11:57AM +0200, Andrew Lunn wrote:
> > On Tue, Jun 01, 2021 at 09:52:35PM +0800, Wong Vee Khee wrote:
> > > On Intel platforms, not all safety features are enabled on the hardware.
> >
> > Is it possible to read a register is determine what safety features
> > have been synthesised?
> >
>
> No. The value of these registers after reset are 0x0. We need to set it
> manually.
That is not what i asked. Sometimes with IP you synthesise from VHDL
or Verilog, there are registers which describe which features you have
actually enabled/disabled in the synthesis. Maybe the stmmac has such
a register describing which safety features are actually available in
your specific version of the IP? You could go ask your ASIC engineers.
Or maybe Synopsys can say that there are no such registers.
Andrew
next prev parent reply other threads:[~2021-06-02 2:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-01 13:52 [PATCH net-next 1/1] net: stmmac: enable platform specific safety features Wong Vee Khee
2021-06-01 22:11 ` Andrew Lunn
2021-06-01 22:53 ` Wong Vee Khee
2021-06-02 2:28 ` Andrew Lunn [this message]
2021-06-02 0:10 ` patchwork-bot+netdevbpf
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