RE: [PATCH v10 3/7] i3c: master: add i3c_secondary_master_register

Parshuram Raju Thombare
2020-12-08T06:01:47Z

>I'm not sure about the logic here. Why would the secondary master
>initialize the bus? If you make a distinction between primary and
>secondary, then the primary should be the owner of the bus and it should
>have enumerated it already. You should populate the bus structure with
>info provided by the primary master not from DT?

Here the bus initialization means programming HW for communicating over
I3C bus and initializing i3c_master_controller object, which is needed for both
primary and secondary masters. Yes, primary master is initial bus master,
it assign addresses to each device detected on I3C bus in DAA and broadcast
the list through DEFSLVS, which is used by secondary masters during their
remaining initialization.

Initial approach was to allow secondary master to get information about
devices on bus from DEFSLVS only, but it was later decided that secondary
master should parse DT as well for any I2C and I3C device information.

Regards,
Parshuram Thombare