[PATCH 39/39] arm64: dts: qcom: sdm630: Add DMA to I2C hosts

Konrad Dybcio
2021-07-28T22:27:26Z

Add DMA properties to I2C hosts to allow for DMA transfers.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 004df7a6eb6c..312f16efd91d 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1802,6 +1802,8 @@ blsp_i2c1: i2c@c175000 {
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp1_dma 4>, <&blsp1_dma 5>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_default>;
@@ -1820,6 +1822,8 @@ blsp_i2c2: i2c@c176000 {
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp1_dma 6>, <&blsp1_dma 7>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
@@ -1838,6 +1842,8 @@ blsp_i2c3: i2c@c177000 {
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp1_dma 8>, <&blsp1_dma 9>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c3_default>;
@@ -1856,6 +1862,8 @@ blsp_i2c4: i2c@c178000 {
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp1_dma 10>, <&blsp1_dma 11>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_default>;
@@ -1902,6 +1910,8 @@ blsp_i2c5: i2c@c1b5000 {
<&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp2_dma 4>, <&blsp2_dma 5>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_default>;
@@ -1920,6 +1930,8 @@ blsp_i2c6: i2c@c1b6000 {
<&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp2_dma 6>, <&blsp2_dma 7>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
@@ -1938,6 +1950,8 @@ blsp_i2c7: i2c@c1b7000 {
<&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp2_dma 8>, <&blsp2_dma 9>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c7_default>;
@@ -1956,6 +1970,8 @@ blsp_i2c8: i2c@c1b8000 {
<&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
+ dmas = <&blsp2_dma 10>, <&blsp2_dma 11>;
+ dma-names = "tx", "rx";

pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c8_default>;
--
2.32.0