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From: Borislav Petkov <bp@alien8.de>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Al Viro <viro@zeniv.linux.org.uk>,
	Dan Williams <dan.j.williams@intel.com>,
	LKML <linux-kernel@vger.kernel.org>,
	the arch/x86 maintainers <x86@kernel.org>,
	Lukas Bulwahn <lukas.bulwahn@gmail.com>
Subject: Re: [patch 01/10] x86/fpu/signal: Clarify exception handling in restore_fpregs_from_user()
Date: Wed, 1 Sep 2021 09:27:40 +0200	[thread overview]
Message-ID: <YS8rbA239gXOT6R6@zn.tnic> (raw)
In-Reply-To: <20210831183921.GA1687448@agluck-desk2.amr.corp.intel.com>

On Tue, Aug 31, 2021 at 11:39:21AM -0700, Luck, Tony wrote:
> You can imagine all you want. And if your imagination is based
> on experiences with very old systems like Haswell (launched in 2015)
> then you'd be right to be skeptical of firmware capabilities.

I wish it were only Haswell boxes. Do you remember how many times I've
talked to you in the past about boxes with broken einj? I don't think
they were all Haswell but I haven't kept track.

> Turn off eMCA in BIOS to avoid this.

I'll try. That is, provided there even is such an option.

> The injection controls in the memory controller can only be accessed
> in SMM mode. Some paranoia there that some ring0 attack could inject
> errors at random intervals causing major costs to diagnose and replace
> "failing" DIMMs. So documentation wouldn't help Linux because it just
> can't twiddle the necessary bits in the h/w.

Yah, that's why this thing needs a BIOS switch which controls injection.
And probably they do that already.

> Downsides of ACPI/EINJ today:
> 1) Availability on production machines. It is always disabled by default
> in BIOS.

That's ok.

> OEMs may not provide a setup option to turn it on (or may have deleted
> the code to support it completely).

Yeah, that's practically the same thing I'm complaining about - einj is
just as useless as before in that case.

> Intel's pre-production servers always have the code, and the setup
> option to enable.

Except that only you and a couple of partners have access to such
boxes. I guess tglx has too and if so that at least answers his initial
complaint about not having an injection method to test kernel code.

> 2) Doesn't inject to 3D-Xpoint (that has its own injection method, but
> it is annoying to have to juggle two methods).

I guess that doesn't matter for our use case of wanting to test the MCE
code, provided one can at least inject somewhere.

> 3) Hard/impossible to inject into SGX memory (because BIOS is untrusted
> and isn't allowed to do a store to push the poison data to DDR).

Oh well.

So, I really wanna believe you that injection capability has improved
but until I see it with my own eyes, I will remain very much sceptical.
And considering how firmware and OEMs are at play here, sceptical is
just the right stance.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2021-09-01  7:27 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-30 16:27 [patch 00/10] x86/fpu: Clean up error handling in sigframe related code Thomas Gleixner
2021-08-30 16:27 ` [patch 01/10] x86/fpu/signal: Clarify exception handling in restore_fpregs_from_user() Thomas Gleixner
2021-08-30 19:33   ` Borislav Petkov
2021-08-30 20:07     ` Borislav Petkov
2021-08-30 20:09     ` Thomas Gleixner
2021-08-30 21:02       ` Al Viro
2021-08-30 21:26         ` Linus Torvalds
2021-08-30 21:30           ` Al Viro
2021-08-30 22:00             ` Linus Torvalds
2021-08-30 22:12               ` Thomas Gleixner
2021-08-30 22:26                 ` Linus Torvalds
2021-08-31  0:06               ` Al Viro
2021-08-31  0:34               ` Thomas Gleixner
2021-08-31  7:39                 ` Borislav Petkov
2021-08-31 18:39                   ` Luck, Tony
2021-09-01  7:27                     ` Borislav Petkov [this message]
2021-08-30 22:01           ` Thomas Gleixner
2021-08-30 22:11             ` Linus Torvalds
2021-09-01 12:00           ` Thomas Gleixner
2021-09-01 15:52             ` Thomas Gleixner
2021-09-01 16:47               ` Sean Christopherson
2021-09-01 19:22                 ` Thomas Gleixner
2021-09-01 19:22                 ` Dave Hansen
2021-09-02 13:08                 ` Jarkko Sakkinen
2021-09-02 14:08                   ` Thomas Gleixner
2021-09-03  6:00                     ` Jarkko Sakkinen
2021-09-03  6:05                       ` Jarkko Sakkinen
2021-08-30 16:27 ` [patch 02/10] x86/fpu/signal: Move header zeroing out of xsave_to_user_sigframe() Thomas Gleixner
2021-08-30 16:27 ` [patch 03/10] x86/fpu/signal: Move xstate clearing out of copy_fpregs_to_sigframe() Thomas Gleixner
2021-08-30 16:27 ` [patch 04/10] x86/fpu/signal: Change return type of copy_fpstate_to_sigframe() to boolean Thomas Gleixner
2021-08-30 16:27 ` [patch 05/10] x86/fpu/signal: Change return type of copy_fpregs_to_sigframe() helpers " Thomas Gleixner
2021-08-30 16:27 ` [patch 06/10] x86/signal: Change return type of restore_sigcontext() " Thomas Gleixner
2021-08-30 16:27 ` [patch 07/10] x86/fpu/signal: Change return type of fpu__restore_sig() " Thomas Gleixner
2021-08-30 16:27 ` [patch 08/10] x86/fpu/signal: Change return type of __fpu_restore_sig() " Thomas Gleixner
2021-08-30 16:27 ` [patch 09/10] x86/fpu/signal: Change return code of check_xstate_in_sigframe() " Thomas Gleixner
2021-08-30 16:27 ` [patch 10/10] x86/fpu/signal: Change return code of restore_fpregs_from_user() " Thomas Gleixner
2021-08-30 17:39 ` [patch 00/10] x86/fpu: Clean up error handling in sigframe related code Linus Torvalds
2021-08-30 18:51   ` Thomas Gleixner

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