From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E25B3C4320A for ; Fri, 27 Aug 2021 02:03:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B10C460E93 for ; Fri, 27 Aug 2021 02:03:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244016AbhH0CEa (ORCPT ); Thu, 26 Aug 2021 22:04:30 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:44182 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231588AbhH0CE3 (ORCPT ); Thu, 26 Aug 2021 22:04:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=GuRZkuKuMuIZkC+HPEQmbSTwj2lMnWB+PUw0G55rLes=; b=vhd7m8gEUoEIMs6OaIWlMmSvXe GKT1vYNssoGR6c4ym6+a/W5UTYIIvJkM02ILKd4++Bq5JIxnXIRfvgdnqHy+/HK46ZXjK9WKRLeeQ SSqAnndp4xK2HmO3h/ZHK6C29Yr4op4JYR9UZ+lhHVRk2Uk5OmJ7Gks4YAHasKlCuFug=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1mJRDP-0042ba-AC; Fri, 27 Aug 2021 04:03:31 +0200 Date: Fri, 27 Aug 2021 04:03:31 +0200 From: Andrew Lunn To: Wong Vee Khee Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S . Miller" , Jakub Kicinski , Maxime Coquelin , Vladimir Oltean , Vivien Didelot , Florian Fainelli , Russell King , Heiner Kallweit , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Vladimir Oltean , Voon Weifeng , Michael Sit Wei Hong Subject: Re: [PATCH net-next v2 1/2] net: pcs: xpcs: enable skip xPCS soft reset Message-ID: References: <20210826235134.4051310-1-vee.khee.wong@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210826235134.4051310-1-vee.khee.wong@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 27, 2021 at 07:51:32AM +0800, Wong Vee Khee wrote: > Unlike any other platforms, Intel AlderLake-S uses Synopsys SerDes where > all the SerDes PLL configurations are controlled by the xPCS at the BIOS > level. If the driver perform a xPCS soft reset on initialization, these > settings will be switched back to the power on reset values. So you have given up on the idea of calling into the BIOS to do this? ACPI is too difficult to use? Can you at least copy the code from the BIOS into the driver? It might then also be possible to fix your inability to swap link speeds? Andrew