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From: Andrew Lunn <andrew@lunn.ch>
To: Luo Jie <luoj@codeaurora.org>
Cc: hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
	kuba@kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, sricharan@codeaurora.org
Subject: Re: [PATCH v3 08/13] net: phy: add qca8081 config_aneg
Date: Mon, 18 Oct 2021 23:37:52 +0200	[thread overview]
Message-ID: <YW3pMD7PD2M3lD3o@lunn.ch> (raw)
In-Reply-To: <20211018033333.17677-9-luoj@codeaurora.org>

On Mon, Oct 18, 2021 at 11:33:28AM +0800, Luo Jie wrote:
> Reuse at803x phy driver config_aneg excepting
> adding 2500M auto-negotiation.
> 
> Signed-off-by: Luo Jie <luoj@codeaurora.org>
> ---
>  drivers/net/phy/at803x.c | 26 +++++++++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
> index 0c22ef735230..c124d3fe40fb 100644
> --- a/drivers/net/phy/at803x.c
> +++ b/drivers/net/phy/at803x.c
> @@ -1084,7 +1084,30 @@ static int at803x_config_aneg(struct phy_device *phydev)
>  			return ret;
>  	}
>  
> -	return genphy_config_aneg(phydev);
> +	/* Do not restart auto-negotiation by setting ret to 0 defautly,
> +	 * when calling __genphy_config_aneg later.
> +	 */
> +	ret = 0;
> +
> +	if (phydev->drv->phy_id == QCA8081_PHY_ID) {
> +		int phy_ctrl = 0;
> +
> +		/* The reg MII_BMCR also needs to be configured for force mode, the
> +		 * genphy_config_aneg is also needed.
> +		 */
> +		if (phydev->autoneg == AUTONEG_DISABLE)
> +			genphy_c45_pma_setup_forced(phydev);
> +
> +		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
> +			phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
> +
> +		ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
> +				MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);

Does the PHY also have MDIO_MMD_AN, MDIO_AN_ADVERTISE ? I'm wondering
if you can use genphy_c45_an_config_aneg()

   Andrew

  reply	other threads:[~2021-10-18 21:38 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18  3:33 [PATCH v3 0/13] net: phy: Add qca8081 ethernet phy driver Luo Jie
2021-10-18  3:33 ` [PATCH v3 01/13] net: phy: at803x: replace AT803X_DEVICE_ADDR with MDIO_MMD_PCS Luo Jie
2021-10-18 18:33   ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 02/13] net: phy: at803x: use phy_modify() Luo Jie
2021-10-18 18:34   ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 03/13] net: phy: at803x: improve the WOL feature Luo Jie
2021-10-18 18:41   ` Andrew Lunn
2021-10-19 11:46     ` Jie Luo
2021-10-19 12:29       ` Andrew Lunn
2021-10-19 12:42         ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 04/13] net: phy: at803x: use GENMASK() for speed status Luo Jie
2021-10-18 18:41   ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 05/13] net: phy: add qca8081 ethernet phy driver Luo Jie
2021-10-18 18:47   ` Andrew Lunn
2021-10-19 11:48     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 06/13] net: phy: add qca8081 read_status Luo Jie
2021-10-18 21:42   ` Andrew Lunn
2021-10-19 12:10     ` Jie Luo
2021-10-19 12:31       ` Andrew Lunn
2021-10-19 12:48         ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 07/13] net: phy: add qca8081 get_features Luo Jie
2021-10-18 21:44   ` Andrew Lunn
2021-10-20  6:39     ` Jie Luo
2021-10-20 12:20       ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 08/13] net: phy: add qca8081 config_aneg Luo Jie
2021-10-18 21:37   ` Andrew Lunn [this message]
2021-10-19 12:12     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 09/13] net: phy: add constants for fast retrain related register Luo Jie
2021-10-18  3:33 ` [PATCH v3 10/13] net: phy: add qca8081 config_init Luo Jie
2021-10-18 21:47   ` Andrew Lunn
2021-10-20  7:07     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 11/13] net: phy: add qca8081 soft_reset and enable master/slave seed Luo Jie
2021-10-18  3:33 ` [PATCH v3 12/13] net: phy: adjust qca8081 master/slave seed value if link down Luo Jie
2021-10-18 22:04   ` Andrew Lunn
2021-10-20 13:27     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 13/13] net: phy: add qca8081 cdt feature Luo Jie

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