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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Borislav Petkov <bp@suse.de>
Cc: Ser Olmy <ser.olmy@protonmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits")
Date: Thu, 14 Oct 2021 14:44:33 +0300	[thread overview]
Message-ID: <YWgYIYXLriayyezv@intel.com> (raw)

Hi,

I have a 32bit installation here that stopped working. Bisected it
to commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved
MXCSR bits").

dhcpcd was the first thing I notice being affected on account of
network not coming up, and after trying to look at it with gdb also
gdb turned out to be broken.

strace of dhcpcd shows a SIGFPE getting delivered, after which it gets
stuck (seem to be sitting in poll but not responding to even ^C).
And gdb seems to be stuck in a perpetual SIGFPE loop and won't even
get to the prompt.

The crucial bit here seems to be that most of the software is built
with -mfpmath=sse. After rebuilding dhcpcd without that it started
to work on the broken kernel. Rebuilding gdb didn't help so I whatever
SSE usage is causing the issue is presumably happening in a library.
Had to do the rebuilds on a working kernel as well because otherwise
the build itself would die to a SIGFPE somewhere.

Tested the same disk on on both a 64bit capable Pentium D
and a 32bit only Pentium 4 just to rule out the specific CPU.
Busted on both.

-- 
Ville Syrjälä
Intel

             reply	other threads:[~2021-10-14 11:44 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-14 11:44 Ville Syrjälä [this message]
2021-10-14 14:27 ` [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits") Borislav Petkov
2021-10-14 14:34   ` Ville Syrjälä
2021-10-14 14:43     ` Ville Syrjälä
2021-10-14 14:56       ` Borislav Petkov
2021-10-14 15:03         ` Ville Syrjälä
2021-10-14 17:45           ` Ville Syrjälä
2021-10-14 18:01             ` Borislav Petkov
2021-10-14 18:46               ` Ville Syrjälä
2021-10-14 19:08                 ` Borislav Petkov
2021-10-15 11:04                   ` Borislav Petkov
2021-10-16  7:26                     ` Ser Olmy
2021-10-16 10:35                       ` Borislav Petkov
2021-10-18  6:55                     ` Ville Syrjälä
2021-10-14 14:44     ` Borislav Petkov
2021-10-16 12:22 ` [tip: x86/urgent] x86/fpu: Mask out the invalid MXCSR bits properly tip-bot2 for Borislav Petkov

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