[PATCH 0/4] KVM: VMX: process posted interrupts on APICv-disable vCPUs

Paolo Bonzini
2021-11-23T00:43:22Z

The fixed version of the patches from last week. To sum up, the issue
is the following.

Now that APICv can be disabled per-CPU (depending on whether it has some
setup that is incompatible) we need to deal with guests having a mix of
vCPUs with enabled/disabled posted interrupts. For assigned devices,
their posted interrupt configuration must be the same across the whole
VM, so handle posted interrupts by hand on vCPUs with disabled posted
interrupts.

Patches 1-3 handle the regular posted interrupt vector, while patch 4
handles the wakeup vector.

Paolo Bonzini (4):
KVM: x86: ignore APICv if LAPIC is not enabled
KVM: VMX: prepare sync_pir_to_irr for running with APICv disabled
KVM: x86: check PIR even for vCPUs with disabled APICv
KVM: x86: Use a stable condition around all VT-d PI paths

arch/x86/kvm/lapic.c | 2 +-
arch/x86/kvm/svm/svm.c | 1 -
arch/x86/kvm/vmx/posted_intr.c | 20 ++++++++++---------
arch/x86/kvm/vmx/vmx.c | 35 ++++++++++++++++++++++------------
arch/x86/kvm/x86.c | 18 ++++++++---------
5 files changed, 44 insertions(+), 32 deletions(-)

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2.27.0