Re: [PATCH net-next 0/3] Add Possiblity to Reset PHY After Power-up

Francesco Dolcini
2021-12-14T12:24:08Z

On Tue, Dec 14, 2021 at 01:16:35PM +0100, Philippe Schenker wrote:
> We do have a hardware design in which the ethernet phy regulator and
> reset are controlled by software. The ethernet PHY is a Microchip
> KSZ9131 [1] and the power sequencing requires a reset after the power
> goes up.
>
> In our case the ethernet PHY is connected to a Freescale FEC and the
> driver is shutting down the regulator on suspend, however on the resume
> path the reset signal is never asserted and because of that the
> ethernet is not working anymore.
>
> To solve this adds a new phy_reset_after_power_on() function, similar
> to the existing phy_reset_after_clk_enable(), and call it in the fec
> resume path after the regulator is switched on as suggested by
> Joakim Zhang <qiangqing.zhang@nxp.com>.
>
> [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002841C.pdf

For the whole series.

Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>