[PATCH 5/8] arm64: dts: qcom: sa8155p-adp: Enable ethernet node

Bhupesh Sharma
2022-01-26T22:18:41Z

From: Vinod Koul <vkoul@kernel.org>

Enable the etheret node, add the phy node and pinctrl for ethernet.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
[bhsharma: Correct ethernet/rgmii related pinmuxs, specify multi-queues and
plug in the PHY interrupt for WOL]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 144 +++++++++++++++++++++++
1 file changed, 144 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
index 8756c2b25c7e..474f688f14a2 100644
--- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
@@ -47,6 +47,65 @@ vreg_s4a_1p8: smps4 {

vin-supply = <&vreg_3p3>;
};
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <4>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,route-up;
+ snps,priority = <0x1>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x1>;
+ snps,route-ptp;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x2>;
+ snps,route-avcp;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x3>;
+ snps,priority = <0xC>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <4>;
+ snps,tx-sched-wrr;
+
+ queue0 {
+ snps,weight = <0x10>;
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ };
+
+ queue1 {
+ snps,weight = <0x11>;
+ snps,dcb-algorithm;
+ snps,priority = <0x1>;
+ };
+
+ queue2 {
+ snps,weight = <0x12>;
+ snps,dcb-algorithm;
+ snps,priority = <0x2>;
+ };
+
+ queue3 {
+ snps,weight = <0x13>;
+ snps,dcb-algorithm;
+ snps,priority = <0x3>;
+ };
+ };
};

&apps_rsc {
@@ -317,6 +376,42 @@ &remoteproc_cdsp {
firmware-name = "qcom/sa8155p/cdsp.mdt";
};

+&ethernet {
+ status = "okay";
+
+ snps,reset-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 11000 70000>;
+
+ snps,ptp-ref-clk-rate = <250000000>;
+ snps,ptp-req-clk-rate = <96000000>;
+
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&ethernet_defaults>;
+
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii";
+ mdio {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ compatible = "snps,dwmac-mdio";
+
+ /* Micrel KSZ9031RNZ PHY */
+ rgmii_phy: phy@7 {
+ reg = <0x7>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts-extended = <&tlmm 124 IRQ_TYPE_EDGE_FALLING>; /* phy intr */
+ device_type = "ethernet-phy";
+ compatible = "ethernet-phy-ieee802.3-c22";
+ };
+ };
+};
+
&uart2 {
status = "okay";
};
@@ -407,4 +502,53 @@ mux {
drive-strength = <2>;
};
};
+
+ ethernet_defaults: ethernet-defaults {
+ mdc {
+ pins = "gpio7";
+ function = "rgmii";
+ bias-pull-up;
+ };
+
+ mdio {
+ pins = "gpio59";
+ function = "rgmii";
+ bias-pull-up;
+ };
+
+ rgmii-rx {
+ pins = "gpio117", "gpio118", "gpio119", "gpio120", "gpio115", "gpio116";
+ function = "rgmii";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ rgmii-tx {
+ pins = "gpio122", "gpio4", "gpio5", "gpio6", "gpio114", "gpio121";
+ function = "rgmii";
+ bias-pull-up;
+ drive-strength = <16>;
+ };
+
+ phy-intr {
+ pins = "gpio124";
+ function = "emac_phy";
+ bias-disable;
+ drive-strength = <8>;
+ };
+
+ pps {
+ pins = "gpio81";
+ function = "emac_pps";
+ bias-disable;
+ drive-strength = <8>;
+ };
+
+ phy-reset {
+ pins = "gpio79";
+ function = "gpio";
+ bias-pull-up;
+ drive-strength = <16>;
+ };
+ };
};
--
2.34.1