From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Taniya Das <tdas@codeaurora.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette ? <mturquette@baylibre.com>,
Rajendra Nayak <rnayak@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [v1 1/2] clk: qcom: gdsc: Use the default transition delay for GDSCs
Date: Thu, 10 Feb 2022 13:28:11 -0600 [thread overview]
Message-ID: <YgVnSy7hjak9aS2T@builder.lan> (raw)
In-Reply-To: <20220209172513.17873-1-tdas@codeaurora.org>
On Wed 09 Feb 11:25 CST 2022, Taniya Das wrote:
> Do not update the transition delay and use the default reset values.
>
> Fixes: 45dd0e55317cc ("clk: qcom: Add support for GDSCs)
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
> drivers/clk/qcom/gdsc.c | 6 +++++-
> drivers/clk/qcom/gdsc.h | 1 +
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
> index 7e1dd8ccfa38..e7b213450640 100644
> --- a/drivers/clk/qcom/gdsc.c
> +++ b/drivers/clk/qcom/gdsc.c
> @@ -380,7 +380,11 @@ static int gdsc_init(struct gdsc *sc)
> */
> mask = HW_CONTROL_MASK | SW_OVERRIDE_MASK |
> EN_REST_WAIT_MASK | EN_FEW_WAIT_MASK | CLK_DIS_WAIT_MASK;
> - val = EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
> +
> + regmap_read(sc->regmap, sc->gdscr, &val);
> +
> + if (!(sc->flags & DEFAULT_TRANSITION_DELAY))
> + val |= EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
Forgot to point out this yesterday, but these are multi-bit values, so
you need to mask out whatever bits are already set before filling in the
new ones.
Regards,
Bjorn
> ret = regmap_update_bits(sc->regmap, sc->gdscr, mask, val);
> if (ret)
> return ret;
> diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
> index d7cc4c21a9d4..1bd3ecdd0b0a 100644
> --- a/drivers/clk/qcom/gdsc.h
> +++ b/drivers/clk/qcom/gdsc.h
> @@ -53,6 +53,7 @@ struct gdsc {
> #define ALWAYS_ON BIT(6)
> #define RETAIN_FF_ENABLE BIT(7)
> #define NO_RET_PERIPH BIT(8)
> +#define DEFAULT_TRANSITION_DELAY BIT(9)
> struct reset_controller_dev *rcdev;
> unsigned int *resets;
> unsigned int reset_count;
> --
> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
> of the Code Aurora Forum, hosted by the Linux Foundation.
>
prev parent reply other threads:[~2022-02-10 19:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 17:25 [v1 1/2] clk: qcom: gdsc: Use the default transition delay for GDSCs Taniya Das
2022-02-09 17:25 ` [v1 2/2] clk: qcom: dispcc: Update gdsc flag for display GDSC Taniya Das
2022-02-09 19:14 ` Steev Klimaszewski
2022-02-09 18:19 ` [v1 1/2] clk: qcom: gdsc: Use the default transition delay for GDSCs Bjorn Andersson
2022-02-09 22:35 ` Bjorn Andersson
2022-02-10 7:28 ` Stephen Boyd
2022-02-10 19:32 ` Bjorn Andersson
2022-02-17 23:19 ` Stephen Boyd
2022-02-21 16:55 ` Taniya Das
2022-02-21 20:42 ` Bjorn Andersson
2022-02-22 11:23 ` Taniya Das
2022-02-10 7:26 ` Stephen Boyd
2022-02-10 19:28 ` Bjorn Andersson [this message]
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