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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id w11-20020a056808140b00b002c0966d9521sm8279466oiv.10.2022.03.01.07.42.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 07:42:27 -0800 (PST) Received: (nullmailer pid 1300489 invoked by uid 1000); Tue, 01 Mar 2022 15:42:26 -0000 Date: Tue, 1 Mar 2022 09:42:26 -0600 From: Rob Herring To: "Peng Fan (OSS)" Cc: jassisinghbrar@gmail.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, krzysztof.kozlowski@canonical.com, daniel.baluta@nxp.com, Peng Fan Subject: Re: [PATCH V5 2/5] dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support Message-ID: References: <20220228024013.2866386-1-peng.fan@oss.nxp.com> <20220228024013.2866386-3-peng.fan@oss.nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220228024013.2866386-3-peng.fan@oss.nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 28, 2022 at 10:40:10AM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication > between Sentinel and Cortex-A cores from hardware design, it could not be > reused for other purpose. > > However i.MX93 S4 MU use separate tx/rx interrupt, so update > interrupts and add interrupt-names property. > > Reviewed-by: Krzysztof Kozlowski > Signed-off-by: Peng Fan > --- > > > Hi Rob, > For dual entries, I tested below with dt_binding_check and dtbs_check > " > + s4muap: s4muap@47520000 { > + compatible = "fsl,imx93-mu-s4"; > + reg = <0x47520000 0x10000>; > + interrupts = , ; > + interrupt-names = "tx", "rx"; > + #mbox-cells = <2>; > + status = "okay"; > + }; > + > + s4muap1: s4muap@48520000 { > + compatible = "fsl,imx8ulp-mu-s4"; > + reg = <0x48520000 0x10000>; > + interrupts = ; > + interrupt-names = "tx", "rx"; Well, that's wrong, but we don't check the length of 'foo-names' against 'foo'. > + #mbox-cells = <2>; > + status = "okay"; > + }; > " > > .../devicetree/bindings/mailbox/fsl,mu.yaml | 28 ++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > index 6d056d5e16bf..82ce0280add9 100644 > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > @@ -29,6 +29,7 @@ properties: > - const: fsl,imx8ulp-mu > - const: fsl,imx8-mu-scu > - const: fsl,imx8-mu-seco > + - const: fsl,imx93-mu-s4 > - const: fsl,imx8ulp-mu-s4 > - items: > - const: fsl,imx93-mu > @@ -55,7 +56,14 @@ properties: > maxItems: 1 > > interrupts: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > + > + interrupt-names: > + minItems: 1 > + items: > + - const: tx > + - const: rx > > "#mbox-cells": > description: | > @@ -90,6 +98,24 @@ required: > - interrupts > - "#mbox-cells" > > +allOf: > + - if: > + properties: > + compatible: > + enum: > + - fsl,imx93-mu-s4 > + then: > + properties: > + interrupt-names: > + minItems: 2 > + interrupts: > + minItems: 2 > + > + else: > + properties: > + interrupts: > + maxItems: 1 You could add: not: required: - interrupt-names Otherwise, Reviewed-by: Rob Herring