From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95A71C433EF for ; Tue, 8 Mar 2022 17:18:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345474AbiCHRTg (ORCPT ); Tue, 8 Mar 2022 12:19:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348777AbiCHRTM (ORCPT ); Tue, 8 Mar 2022 12:19:12 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 222BF1EEC1 for ; Tue, 8 Mar 2022 09:18:14 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AEBC060C82 for ; Tue, 8 Mar 2022 17:18:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3BE2EC340EB; Tue, 8 Mar 2022 17:18:11 +0000 (UTC) Date: Tue, 8 Mar 2022 17:18:07 +0000 From: Catalin Marinas To: Robin Murphy Cc: Arnd Bergmann , Marc Zyngier , Rongwei Wang , Will Deacon , joey.gouly@arm.com, Mark Rutland , Andrew Morton , Linux ARM , Linux Kernel Mailing List Subject: Re: [PATCH RFC] arm64: improve display about CPU architecture in cpuinfo Message-ID: References: <20220307030417.22974-1-rongwei.wang@linux.alibaba.com> <87h78a178u.wl-maz@kernel.org> <87bkyi0x53.wl-maz@kernel.org> <1b94af8b-a294-5765-4e1e-896f70db621f@arm.com> <9296f97c-f894-001c-53e6-41bbfe36ce71@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9296f97c-f894-001c-53e6-41bbfe36ce71@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 07, 2022 at 08:05:06PM +0000, Robin Murphy wrote: > On 2022-03-07 19:30, Arnd Bergmann wrote: > > On Mon, Mar 7, 2022 at 5:48 PM Robin Murphy wrote: > > > > > And arguably it's not even too late, because 10 years ago this *did* say > > > "AArch64". I don't remember all the exact details behind commit > > > 44b82b7700d0 ("arm64: Fix up /proc/cpuinfo") - this just tickled enough > > > of a memory to go and look up the git history - but I don't think we > > > changed any of those fields without a real reason. > > > > > > > The patch description does state that this was done for compatibility with > > 32-bit architectures, which does make some sense. I suppose for similar > > reasons, the arch/arm/ version of /proc/cpuinfo is now stuck at > > 'CPU architecture: 7', even for ARMv8 or higher in aarch32 mode. > > > > The part that I find more annoying is how we leave out the one bit > > of information that people are generally looking for in /proc/cpuinfo: > > the name of the processor. Even though we already know the > > exact processor type in order to handle the CPU errata, this is > > always "model name\t: ARMv7 Processor rev %d (v7l)" on 32-bit, > > and "model name\t: ARMv8 Processor rev %d (%s)" on 64-bit, > > with the revision being the least important bit of information here... > > Eh, it's hardly impossible to recompose a MIDR value from the implementer, > part, variant and revision fields if one actually needs to. Maybe we could > null-terminate the raw MIDR value and print it as a string of > largely-unprintable characters in the "model name" field... I guess that > might satisfy the crowd who want parity* with x86 CPUID, at least :) You can get the MIDR from /sys/devices/system/cpu/cpu*/regs/identification/midr_el1. As for printing the actual names, we thought we'd leave it to tools like lscpu. I'm not keen on maintaining a dictionary of MIDR to CPU marketing names in the kernel, deal with rebranding and so on. For x86 you can get the name from the CPU itself IIUC, that's not the case for arm. -- Catalin