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[104.199.75.203]) by smtp.gmail.com with ESMTPSA id g6-20020a5d5406000000b001f049726044sm15113078wrv.79.2022.03.22.02.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Mar 2022 02:20:30 -0700 (PDT) Date: Tue, 22 Mar 2022 09:20:27 +0000 From: Keir Fraser To: Jason Wang Cc: "Michael S. Tsirkin" , virtualization , linux-kernel Subject: Re: [PATCH] virtio: pci: Sanity check the bar index in find_shm_cap Message-ID: References: <20220321154931.859511-1-keirf@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 22, 2022 at 11:36:23AM +0800, Jason Wang wrote: > On Mon, Mar 21, 2022 at 11:49 PM Keir Fraser wrote: > > > > The bar index is used as an index into the device's resource list > > and should be checked as within range for a standard bar. > > > > Signed-off-by: Keir Fraser > > Patch looks good, do we need a similar check in vp_modern_map_capability()? Yes it looks like we do. Would you like me to fix that also? If so: separate patch, or revised version of this patch? > Thanks > > > --- > > drivers/virtio/virtio_pci_modern.c | 10 ++++++++-- > > 1 file changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c > > index 5455bc041fb6..84bace98dff5 100644 > > --- a/drivers/virtio/virtio_pci_modern.c > > +++ b/drivers/virtio/virtio_pci_modern.c > > @@ -293,7 +293,7 @@ static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id, > > > > for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR); pos > 0; > > pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) { > > - u8 type, cap_len, id; > > + u8 type, cap_len, id, res_bar; > > u32 tmp32; > > u64 res_offset, res_length; > > > > @@ -317,7 +317,12 @@ static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id, > > > > /* Type, and ID match, looks good */ > > pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, > > - bar), bar); > > + bar), &res_bar); > > + if (res_bar >= PCI_STD_NUM_BARS) { > > + dev_err(&dev->dev, "%s: shm cap with bad bar: %d\n", > > + __func__, res_bar); > > + continue; > > + } > > > > /* Read the lower 32bit of length and offset */ > > pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, > > @@ -337,6 +342,7 @@ static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id, > > length_hi), &tmp32); > > res_length |= ((u64)tmp32) << 32; > > > > + *bar = res_bar; > > *offset = res_offset; > > *len = res_length; > > > > -- > > 2.35.1.894.gb6a874cedc-goog > > >