From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F469C433F5 for ; Wed, 6 Apr 2022 05:57:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232406AbiDFF6c (ORCPT ); Wed, 6 Apr 2022 01:58:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377408AbiDFFwB (ORCPT ); Wed, 6 Apr 2022 01:52:01 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F73D344FE1; Tue, 5 Apr 2022 22:09:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649221793; x=1680757793; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=7akzH623VSv4BBE9/ra9/iPv62pdaCdpBK5z80L2VRs=; b=jqov6GriHomjrrVGxh5CFqpZd0AhtAO/LykuWK0WIkYSjH4fsJBMkA8D Jozos8DVbyjpxf9jeGWbFuwc74mf587+BvjUW3qBqK5cz3ABkEqF3wXr5 70tGoMeYyu+EkyZlL5MLSMH9ZnU02J8+m8gsdXvGIQlmbgKsNbucfbo1v 3a7ZaKPCkzAqlF3j1UppBnvKxILsdsSjvQ3XfKrBKcc8A0bgTLrC/I1Qp l3Oi7JbCD2p2PskPoA/+4GJt84E7JYvdb+e1Lu+e8I6PcnCpDlapVKHJf 62NljGxTDeKd3UMRyeRTVVVSEWLgsTcgufIlmf1Dx17ED7cwrkluoSLHx Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10308"; a="259785423" X-IronPort-AV: E=Sophos;i="5.90,239,1643702400"; d="scan'208";a="259785423" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Apr 2022 22:09:53 -0700 X-IronPort-AV: E=Sophos;i="5.90,239,1643702400"; d="scan'208";a="523776195" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.162]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Apr 2022 22:09:50 -0700 Received: by lahna (sSMTP sendmail emulation); Wed, 06 Apr 2022 08:09:48 +0300 Date: Wed, 6 Apr 2022 08:09:48 +0300 From: Mika Westerberg To: Andy Shevchenko Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko , Linus Walleij Subject: Re: [PATCH v1 1/1] pinctrl: alderlake: Fix register offsets for ADL-N variant Message-ID: References: <20220405170251.72154-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220405170251.72154-1-andriy.shevchenko@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 05, 2022 at 08:02:51PM +0300, Andy Shevchenko wrote: > It appears that almost traditionally the N variants have deviations > in the register offsets in comparison to S one. This is the case > for Intel Alder Lake as well. Fix register offsets for ADL-N variant. > > Fixes: 114b610b9048 ("pinctrl: alderlake: Add Intel Alder Lake-N pin controller support") > Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg