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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id p10-20020a637f4a000000b00373a2760775sm338009pgn.2.2022.03.31.15.27.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Mar 2022 15:27:10 -0700 (PDT) Date: Thu, 31 Mar 2022 22:27:06 +0000 From: Sean Christopherson To: Zeng Guang Cc: Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, Dave Hansen , Tony Luck , Kan Liang , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Kim Phillips , Jarkko Sakkinen , Jethro Beekman , Kai Huang , x86@kernel.org, linux-kernel@vger.kernel.org, Robert Hu , Gao Chao , Robert Hoo Subject: Re: [PATCH v7 2/8] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation Message-ID: References: <20220304080725.18135-1-guang.zeng@intel.com> <20220304080725.18135-3-guang.zeng@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220304080725.18135-3-guang.zeng@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 04, 2022, Zeng Guang wrote: > +#define BUILD_CONTROLS_SHADOW(lname, uname, bits) \ > +static inline \ > +void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \ > +{ \ > + if (vmx->loaded_vmcs->controls_shadow.lname != val) { \ > + vmcs_write##bits(uname, val); \ > + vmx->loaded_vmcs->controls_shadow.lname = val; \ > + } \ > +} \ > +static inline u##bits __##lname##_controls_get(struct loaded_vmcs *vmcs)\ > +{ \ > + return vmcs->controls_shadow.lname; \ > +} \ > +static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \ > +{ \ > + return __##lname##_controls_get(vmx->loaded_vmcs); \ > +} \ > +static inline \ Drop the newline, there's no need to split this across two lines. Aligning the backslashes will mean they all poke past the 80 char soft limit, but that's totally ok. The whole point of the line limit is to improve readability, and a trivial runover is much less painful than a split function declaration. As a bonus, all the backslashes are aligned, have leading whitespace, and still land on a tab stop :-) #define BUILD_CONTROLS_SHADOW(lname, uname, bits) \ static inline void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \ { \ if (vmx->loaded_vmcs->controls_shadow.lname != val) { \ vmcs_write##bits(uname, val); \ vmx->loaded_vmcs->controls_shadow.lname = val; \ } \ } \ static inline u##bits __##lname##_controls_get(struct loaded_vmcs *vmcs) \ { \ return vmcs->controls_shadow.lname; \ } \ static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \ { \ return __##lname##_controls_get(vmx->loaded_vmcs); \ } \ static inline void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \ { \ lname##_controls_set(vmx, lname##_controls_get(vmx) | val); \ } \ static inline void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \ { \ lname##_controls_set(vmx, lname##_controls_get(vmx) & ~val); \ } With that fixed, Reviewed-by: Sean Christopherson > +void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \ > +{ \ > + lname##_controls_set(vmx, lname##_controls_get(vmx) | val); \ > +} \ > +static inline \ > +void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \ > +{ \ > + lname##_controls_set(vmx, lname##_controls_get(vmx) & ~val); \ > } > -BUILD_CONTROLS_SHADOW(vm_entry, VM_ENTRY_CONTROLS) > -BUILD_CONTROLS_SHADOW(vm_exit, VM_EXIT_CONTROLS) > -BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL) > -BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL) > -BUILD_CONTROLS_SHADOW(secondary_exec, SECONDARY_VM_EXEC_CONTROL) > +BUILD_CONTROLS_SHADOW(vm_entry, VM_ENTRY_CONTROLS, 32) > +BUILD_CONTROLS_SHADOW(vm_exit, VM_EXIT_CONTROLS, 32) > +BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL, 32) > +BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL, 32) > +BUILD_CONTROLS_SHADOW(secondary_exec, SECONDARY_VM_EXEC_CONTROL, 32) > > /* > * VMX_REGS_LAZY_LOAD_SET - The set of registers that will be updated in the > -- > 2.27.0 >