[PATCH v4 33/33] crypto: rockchip: Check for clocks numbers and their frequencies

Corentin Labbe
2022-04-01T20:20:59Z

Add the number of clocks needed for each compatible.
Rockchip's datasheet give maximum frequencies for some clocks, so add
checks for verifying they are within limits. Let's start with rk3288 for
clock frequency check, other will came later.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
drivers/crypto/rockchip/rk3288_crypto.c | 56 +++++++++++++++++++++----
drivers/crypto/rockchip/rk3288_crypto.h | 9 ++++
2 files changed, 57 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
index 89a6aa65d2c1..f759ed7160d0 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -29,20 +29,63 @@ static struct rk_crypto_info *main;

static const struct rk_variant rk3288_variant = {
.main = true,
+ .num_clks = 4,
+ .rkclks = {
+ { "sclk", 150000000},
+ }
};

static const struct rk_variant rk3328_variant = {
.main = true,
+ .num_clks = 3,
};

static const struct rk_variant rk3399_variant0 = {
.main = true,
+ .num_clks = 3,
};

static const struct rk_variant rk3399_variant1 = {
.sub = true,
+ .num_clks = 3,
};

+static int rk_crypto_get_clks(struct rk_crypto_info *dev)
+{
+ int i, j, err;
+ unsigned long cr;
+
+ dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks);
+ if (dev->num_clks < dev->variant->num_clks) {
+ dev_err(dev->dev, "Missing clocks, got %d instead of %d\n",
+ dev->num_clks, dev->variant->num_clks);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < dev->num_clks; i++) {
+ cr = clk_get_rate(dev->clks[i].clk);
+ for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) {
+ if (dev->variant->rkclks[j].max == 0)
+ continue;
+ if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id))
+ continue;
+ if (cr > dev->variant->rkclks[j].max) {
+ err = clk_set_rate(dev->clks[i].clk,
+ dev->variant->rkclks[j].max);
+ if (err)
+ dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n",
+ dev->variant->rkclks[j].name, cr,
+ dev->variant->rkclks[j].max);
+ else
+ dev_info(dev->dev, "Downclocking %s from %lu to %lu\n",
+ dev->variant->rkclks[j].name, cr,
+ dev->variant->rkclks[j].max);
+ }
+ }
+ }
+ return 0;
+}
+
static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
{
int err;
@@ -266,6 +309,9 @@ static int rk_crypto_probe(struct platform_device *pdev)
goto err_crypto;
}

+ crypto_info->dev = &pdev->dev;
+ platform_set_drvdata(pdev, crypto_info);
+
crypto_info->variant = of_device_get_match_data(&pdev->dev);
if (!crypto_info->variant) {
dev_err(&pdev->dev, "Missing variant\n");
@@ -289,12 +335,9 @@ static int rk_crypto_probe(struct platform_device *pdev)
goto err_crypto;
}

- crypto_info->num_clks = devm_clk_bulk_get_all(&pdev->dev,
- &crypto_info->clks);
- if (crypto_info->num_clks < 3) {
- err = -EINVAL;
+ err = rk_crypto_get_clks(crypto_info);
+ if (err)
goto err_crypto;
- }

crypto_info->irq = platform_get_irq(pdev, 0);
if (crypto_info->irq < 0) {
@@ -312,9 +355,6 @@ static int rk_crypto_probe(struct platform_device *pdev)
goto err_crypto;
}

- crypto_info->dev = &pdev->dev;
- platform_set_drvdata(pdev, crypto_info);
-
crypto_info->engine = crypto_engine_alloc_init(&pdev->dev, true);
crypto_engine_start(crypto_info->engine);
init_completion(&crypto_info->complete);
diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
index 5662a1491a9e..b49bdc7541b1 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.h
+++ b/drivers/crypto/rockchip/rk3288_crypto.h
@@ -188,9 +188,18 @@
#define CRYPTO_WRITE(dev, offset, val) \
writel_relaxed((val), ((dev)->reg + (offset)))

+#define RK_MAX_CLKS 4
+
+struct rk_clks {
+ const char *name;
+ unsigned long max;
+};
+
struct rk_variant {
bool main;
bool sub;
+ int num_clks;
+ struct rk_clks rkclks[RK_MAX_CLKS];
};

struct rk_crypto_info {
--
2.35.1