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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id w137-20020a627b8f000000b0050dc76281bbsm249334pfc.149.2022.05.17.15.52.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 15:52:52 -0700 (PDT) Date: Tue, 17 May 2022 22:52:48 +0000 From: Sean Christopherson To: Dave Hansen Cc: "Kirill A. Shutemov" , tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, luto@kernel.org, peterz@infradead.org, sathyanarayanan.kuppuswamy@linux.intel.com, ak@linux.intel.com, dan.j.williams@intel.com, david@redhat.com, hpa@zytor.com, thomas.lendacky@amd.com, x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] x86/tdx: Handle load_unaligned_zeropad() page-cross to a shared page Message-ID: References: <20220517153021.11116-1-kirill.shutemov@linux.intel.com> <20220517174042.v6s7wm3u5j2ebaoq@black.fi.intel.com> <20220517201710.ixbpsaga5jzvokvy@black.fi.intel.com> <083519ab-752f-9815-7741-22b3fcc03322@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 17, 2022, Sean Christopherson wrote: > On Tue, May 17, 2022, Dave Hansen wrote: > > On 5/17/22 13:17, Kirill A. Shutemov wrote: > > >>> Given that we had to adjust IP in handle_mmio() anyway, do you still think > > >>> "ve->instr_len = 0;" is wrong? I dislike ip_adjusted more. > > >> Something is wrong about it. > > >> > > >> You could call it 've->instr_bytes_to_handle' or something. Then it > > >> makes actual logical sense when you handle it to zero it out. I just > > >> want it to be more explicit when the upper levels need to do something. > > >> > > >> Does ve->instr_len==0 both when the TDX module isn't providing > > >> instruction sizes *and* when no handling is necessary? That seems like > > >> an unfortunate logical multiplexing of 0. > > > For EPT violation, ve->instr_len has *something* (not zero) that doesn't > > > match the actual instruction size. I dig out that it is filled with data > > > from VMREAD(0x440C), but I don't know where is the ultimate origin of the > > > data. > > > > The SDM has a breakdown: > > > > 27.2.5 Information for VM Exits Due to Instruction Execution > > > > I didn't realize it came from VMREAD. I guess I assumed it came from > > some TDX module magic. Silly me. > > > > The SDM makes it sound like we should be more judicious about using > > 've->instr_len' though. "All VM exits other than those listed in the > > above items leave this field undefined." Looking over > > virt_exception_kernel(), we've got five cases from CPU instructions that > > cause unconditional VMEXITs: Ideally, what the SDM says wouldn't matter at all. The TDX module spec really should be the authorative source in this case, but it just punts to the SDM: The 32-bit value that would have been saved into the VMCS as VM-exit instruction length if a legacy VM exit had occurred instead of the virtualization exception. Even if the TDX spec wants to punt to the SDM, it would save a lot of headache and SDM reading if it also said something to the effect of: The INSTRUCTION_LENGTH and INSTRUCTION_INFORMATION fields are valid for all #VEs injected by the Intel TDX Module. The fields are undefined for #VEs injected by the CPU due to EPT Violations.