From: Sean Christopherson <seanjc@google.com>
To: Jon Kohler <jon@nutanix.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Andrea Arcangeli <aarcange@redhat.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Kees Cook <keescook@chromium.org>,
Waiman Long <longman@redhat.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] KVM: VMX: do not disable interception for MSR_IA32_SPEC_CTRL on eIBRS
Date: Fri, 20 May 2022 20:06:09 +0000 [thread overview]
Message-ID: <Yof0sSy/xKrCY5ke@google.com> (raw)
In-Reply-To: <732266F9-9904-434A-857F-847203901A0C@nutanix.com>
On Fri, May 20, 2022, Jon Kohler wrote:
>
> > On May 18, 2022, at 10:23 AM, Jon Kohler <jon@nutanix.com> wrote:
> >
> >> On May 17, 2022, at 9:42 PM, Sean Christopherson <seanjc@google.com> wrote:
> >>> + if (boot_cpu_has(X86_FEATURE_IBRS_ENHANCED) && data == BIT(0)) {
> >>
> >> Use SPEC_CTRL_IBRS instead of open coding "BIT(0)", then a chunk of the comment
> >> goes away.
> >>
> >>> + vmx->spec_ctrl = data;
> >>> + break;
> >>> + }
> >>
> >> There's no need for a separate if statement. And the boot_cpu_has() check can
> >> be dropped, kvm_spec_ctrl_test_value() has already verified the bit is writable
> >> (unless you're worried about bit 0 being used for something else?)
>
> I was (and am) worried about misbehaving guests on pre-eIBRS systems spamming IBRS
> MSR, which we wouldn’t be able to see today. Intel’s guidance for eIBRS has long been
> set it once and be done with it, so any eIBRS aware guest should behave nicely with that.
> That limits the blast radius a bit here.
Then check the guest capabilities, not the host flag.
if (data == SPEC_CTRL_IBRS &&
(vcpu->arch.arch_capabilities & ARCH_CAP_IBRS_ALL))
> Sent out the v2 just now with a few minor tweaks, only notable one was keeping
> the boot cpu check and small tweaks to comments here and there to suit.
In the future, give reviewers a bit of time to respond to a contented point before
sending out the next revision, e.g. you could have avoided v3 :-)
next prev parent reply other threads:[~2022-05-20 20:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-12 17:44 [PATCH] KVM: VMX: do not disable interception for MSR_IA32_SPEC_CTRL on eIBRS Jon Kohler
2022-05-16 18:27 ` Jon Kohler
2022-05-18 1:42 ` Sean Christopherson
2022-05-18 14:23 ` Jon Kohler
2022-05-20 19:55 ` Jon Kohler
2022-05-20 20:06 ` Sean Christopherson [this message]
2022-05-20 20:14 ` Jon Kohler
2022-05-20 20:30 ` Sean Christopherson
2022-05-20 20:33 ` Jon Kohler
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