Re: [PATCH v4 1/4] dt-bindings: interconnect: qcom,sdm845-cpu-bwmon: add BWMON device

Bjorn Andersson
2022-06-06T21:09:39Z

On Wed 01 Jun 03:11 PDT 2022, Krzysztof Kozlowski wrote:

> Add bindings for the Qualcomm Bandwidth Monitor device providing
> performance data on interconnects. The bindings describe only BWMON
> version 4, e.g. the instance on SDM845 between CPU and Last Level Cache
> Controller.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Acked-by: Georgi Djakov <djakov@kernel.org>
> ---
> .../interconnect/qcom,sdm845-cpu-bwmon.yaml | 97 +++++++++++++++++++
> 1 file changed, 97 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu-bwmon.yaml
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu-bwmon.yaml
> new file mode 100644
> index 000000000000..8c82e06ee432
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu-bwmon.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interconnect/qcom,sdm845-cpu-bwmon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Interconnect Bandwidth Monitor
> +
> +maintainers:
> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> +
> +description:
> + Bandwidth Monitor measures current throughput on buses between various NoC
> + fabrics and provides information when it crosses configured thresholds.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sdm845-cpu-bwmon # BWMON v4

It seems the thing that's called bwmon v4 is compatible with a number of
different platforms, should we add a generic compatible to the binding
as well, to avoid having to update the implementation for each SoC?

(I.e. "qcom,sdm845-cpu-bwmon", "qcom,bwmon-v4")

Regards,
Bjorn

> +
> + interconnects:
> + maxItems: 2
> +
> + interconnect-names:
> + items:
> + - const: ddr
> + - const: l3c
> +
> + interrupts:
> + maxItems: 1
> +
> + operating-points-v2: true
> + opp-table: true
> +
> + reg:
> + # Currently described BWMON v4 and v5 use one register address space.
> + # BWMON v2 uses two register spaces - not yet described.
> + maxItems: 1
> +
> +required:
> + - compatible
> + - interconnects
> + - interconnect-names
> + - interrupts
> + - operating-points-v2
> + - opp-table
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interconnect/qcom,osm-l3.h>
> + #include <dt-bindings/interconnect/qcom,sdm845.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + pmu@1436400 {
> + compatible = "qcom,sdm845-cpu-bwmon";
> + reg = <0x01436400 0x600>;
> +
> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnect-names = "ddr", "l3c";
> +
> + operating-points-v2 = <&cpu_bwmon_opp_table>;
> +
> + cpu_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-0 {
> + opp-peak-kBps = <800000 4800000>;
> + };
> + opp-1 {
> + opp-peak-kBps = <1804000 9216000>;
> + };
> + opp-2 {
> + opp-peak-kBps = <2188000 11980800>;
> + };
> + opp-3 {
> + opp-peak-kBps = <3072000 15052800>;
> + };
> + opp-4 {
> + opp-peak-kBps = <4068000 19353600>;
> + };
> + opp-5 {
> + opp-peak-kBps = <5412000 20889600>;
> + };
> + opp-6 {
> + opp-peak-kBps = <6220000 22425600>;
> + };
> + opp-7 {
> + opp-peak-kBps = <7216000 25497600>;
> + };
> + };
> + };
> --
> 2.34.1
>