Re: [PATCH] arm64: errata: add detection for AMEVCNTR01 incrementing incorrectly

[Catalin Marinas <catalin.marinas@arm.com>]

On Tue, Jun 14, 2022 at 02:42:58PM +0100, Ionela Voinescu wrote:
> On Friday 10 Jun 2022 at 17:47:12 (+0100), Catalin Marinas wrote:
> > On Tue, Jun 07, 2022 at 01:53:40PM +0100, Ionela Voinescu wrote:
> > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > > index 42ea2bd856c6..b9e4b2bd2c63 100644
> > > --- a/arch/arm64/kernel/cpufeature.c
> > > +++ b/arch/arm64/kernel/cpufeature.c
> > > @@ -1791,6 +1791,19 @@ int get_cpu_with_amu_feat(void)
> > >  	return cpumask_any(&amu_cpus);
> > >  }
> > >  
> > > +bool cpu_has_broken_amu_constcnt(void)
> > > +{
> > > +	/* List of CPUs which have broken AMEVCNTR01 (constant counter) */
> > > +	static const struct midr_range cpus[] = {
> > > +#ifdef CONFIG_ARM64_ERRATUM_2457168
> > > +		MIDR_RANGE(MIDR_CORTEX_A510, 0, 0, 1, 1),
> > > +#endif
> > > +		{},
> > > +	};
> > > +
> > > +	return is_midr_in_range(read_cpuid_id(), cpus);
> > > +}
> > 
> > I'd rather not have this in cpufeature.c as it's not really a feature.
> > We have some precedent with checking errata in cpufeature.c but IIRC we
> > did that only to check whether to enable a feature or not in that file
> > (DBM).
> 
> If it's okay with you I can move this to cpu_errata.c:arm64_errata[], but
> the type of the capability would have to be
> ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE. I see there are other workarounds
> like this so I hope it's not a problem.

I think this should work. If you want to make a per-CPU decision,
instead of checking cpus_have_const_cap(), use this_cpu_has_cap(). It
would read the actual CPU regs pretty much like your
cpu_has_broken_amu_constcnt() but at least is more unified with the
errata framework.

-- 
Catalin