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[2003:e4:1f12:c800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id 129-20020a1c0287000000b0039db31f6372sm3632782wmc.2.2022.06.22.06.54.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jun 2022 06:54:51 -0700 (PDT) Date: Wed, 22 Jun 2022 15:54:49 +0200 From: Thierry Reding To: Chris Packham , linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, andrew@lunn.ch, thomas.petazzoni@free-electrons.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Subject: Re: [PATCH v4 3/3] dt-bindings: gpio: gpio-mvebu: document offset and marvell,pwm-offset Message-ID: References: <20220526012946.3862776-1-chris.packham@alliedtelesis.co.nz> <20220526012946.3862776-4-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="SkTTDVTmLy6JJbVk" Content-Disposition: inline In-Reply-To: <20220526012946.3862776-4-chris.packham@alliedtelesis.co.nz> User-Agent: Mutt/2.2.4 (c3baa83e) (2022-04-30) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --SkTTDVTmLy6JJbVk Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, May 26, 2022 at 01:29:46PM +1200, Chris Packham wrote: > The offset and marvell,pwm-offset properties weren't in the old binding. > Add them based on the existing usage in the driver and board DTS when > the marvell,armada-8k-gpio compatible is used. >=20 > Signed-off-by: Chris Packham > Reviewed-by: Krzysztof Kozlowski > --- >=20 > Notes: > Changes in v4: > - Reword commit message slightly > - Add review from Krzysztof > Changes in v3: > - Split off from 1:1 conversion patch >=20 > Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Doc= umentation/devicetree/bindings/gpio/gpio-mvebu.yaml > index 459ec35864fe..f1bd1e6b2e1f 100644 > --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > @@ -45,6 +45,10 @@ properties: > - const: pwm > minItems: 1 > =20 > + offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Offset in the register map for the gpio registers (in b= ytes) > + > interrupts: > description: | > The list of interrupts that are used for all the pins managed by t= his > @@ -68,6 +72,10 @@ properties: > "#gpio-cells": > const: 2 > =20 > + marvell,pwm-offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Offset in the register map for the pwm registers (in by= tes) > + It would probably have been better to add multiple compatible strings to hide parameters like this, but given that this has been in the DTS files for more than a year at this point, it's probably too late now. Acked-by: Thierry Reding Linus, Bartosz, will you pick up the series into the GPIO tree? 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