From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4A07CCA47C for ; Thu, 23 Jun 2022 11:07:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231231AbiFWLHs (ORCPT ); Thu, 23 Jun 2022 07:07:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230361AbiFWLHr (ORCPT ); Thu, 23 Jun 2022 07:07:47 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C26F34B431; Thu, 23 Jun 2022 04:07:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655982463; x=1687518463; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=psEJ+vJmelq51ss3ng/bRO3PFKsQrysX325BnCxiWyU=; b=XeazfvLOTFqA9JJstho5+tEtmUuMAZfqaPxIBKbLJ6+cnyKmO0SJDdZd 7MCxRDnhFh8aZmixMu5RWWNONkOj4wU8b65IZzW64gCsk10k5JXt3BnvJ 5WcekYVw3tp0msPscz4CMfKdYpk97hsBmZBwe16iDQjZ0dmyYq8fPrVY0 hXaOjNr8oqtGQTENCfxDNlmLK0bz7HkzLzCcqhfx8zI4v1CbOHCYjKv7w kjxXgujAOiZUntR4+jkNtYn5K0Wge7nSPNHObjvOAtfvFQ/wumzKZgGqB Xp+UBF6bH0jg/eWIc5ENqa+9njSpGyM17KEdGZzNVFNt1yOGHetK9BvDu A==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="342373217" X-IronPort-AV: E=Sophos;i="5.92,215,1650956400"; d="scan'208";a="342373217" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 04:07:43 -0700 X-IronPort-AV: E=Sophos;i="5.92,215,1650956400"; d="scan'208";a="644687438" Received: from hazegrou-mobl.ger.corp.intel.com (HELO intel.com) ([10.251.216.121]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 04:07:37 -0700 Date: Thu, 23 Jun 2022 13:07:35 +0200 From: Andi Shyti To: Mauro Carvalho Chehab Cc: Chris Wilson , Fei Yang , =?utf-8?Q?Micha=C5=82?= Winiarski , Thomas Hellstrom , Andi Shyti , Daniel Vetter , Daniele Ceraolo Spurio , Dave Airlie , David Airlie , Jani Nikula , John Harrison , Joonas Lahtinen , Lucas De Marchi , Matt Roper , Matthew Auld , Rodrigo Vivi , Tvrtko Ursulin , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, mauro.chehab@linux.intel.com, stable@vger.kernel.org, Thomas =?iso-8859-15?Q?Hellstr=F6m?= Subject: Re: [PATCH 2/6] drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations Message-ID: References: <653bf9815d562f02c7247c6b66b85b243f3172e7.1655306128.git.mchehab@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <653bf9815d562f02c7247c6b66b85b243f3172e7.1655306128.git.mchehab@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mauro, On Wed, Jun 15, 2022 at 04:27:36PM +0100, Mauro Carvalho Chehab wrote: > From: Chris Wilson > > On gen12 HW, ensure that the TLB of the OA unit is also invalidated > as just invalidating the TLB of an engine is not enough. > > Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") > > Signed-off-by: Chris Wilson > Cc: Fei Yang > Cc: Andi Shyti > Cc: stable@vger.kernel.org > Acked-by: Thomas Hellström > Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Andi Shyti Thanks, Andi