From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2A37C433EF for ; Wed, 20 Jul 2022 13:58:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239608AbiGTN6H (ORCPT ); Wed, 20 Jul 2022 09:58:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231520AbiGTN5w (ORCPT ); Wed, 20 Jul 2022 09:57:52 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09CC02E6AE; Wed, 20 Jul 2022 06:57:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=/V/i02J0VSRwEin3lvenpGuASuy6JoHCfCbef3bNo8k=; b=AJbBnkbb3Kn1TkfXCR8F78pR67 dCBZGTOXmz1AK+Qv7hPVwD2CwqZlMbLWf1oNXN0QJYk2Kgztj5R9yWrnRMVK1DZxFMIOfuQb8z9CZ nx+Sf9zSC/W6vpjR99ssCoPnJNmjSA87DIfBPGvNDdtPNV89hGB+YYbcVB8Ul8eZr3PM2VVRTCpyH R2e+bixWFQJsN+9k2nP5n0aHLtngYIHvbFsBWeKdcxwdBQEiTX72kKq0szg+6OeXFvaJKklo1DWfW 8q0evvqxehyTCnafLMCvG2FWzjrqFvKxUm9x0UCInyef7HIFVnswl8K2kbwr03kZGUbRG8Wqn6xYS /NtRKm/w==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=worktop.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1oEACp-00EVuU-Ql; Wed, 20 Jul 2022 13:57:39 +0000 Received: by worktop.programming.kicks-ass.net (Postfix, from userid 1000) id 6DC13980BBE; Wed, 20 Jul 2022 15:57:37 +0200 (CEST) Date: Wed, 20 Jul 2022 15:57:37 +0200 From: Peter Zijlstra To: kan.liang@linux.intel.com Cc: mingo@redhat.com, acme@kernel.org, vincent.weaver@maine.edu, linux-kernel@vger.kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, pawan.kumar.gupta@linux.intel.com, stable@vger.kernel.org Subject: Re: [PATCH] perf/x86/intel/lbr: Fix unchecked MSR access error on HSW Message-ID: References: <20220714182630.342107-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220714182630.342107-1-kan.liang@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 14, 2022 at 11:26:30AM -0700, kan.liang@linux.intel.com wrote: > From: Kan Liang > > The fuzzer triggers the below trace. > > [ 7763.384369] unchecked MSR access error: WRMSR to 0x689 > (tried to write 0x1fffffff8101349e) at rIP: 0xffffffff810704a4 > (native_write_msr+0x4/0x20) > [ 7763.397420] Call Trace: > [ 7763.399881] > [ 7763.401994] intel_pmu_lbr_restore+0x9a/0x1f0 > [ 7763.406363] intel_pmu_lbr_sched_task+0x91/0x1c0 > [ 7763.410992] __perf_event_task_sched_in+0x1cd/0x240 > > On a machine with the LBR format LBR_FORMAT_EIP_FLAGS2, when the TSX is > disabled, a TSX quirk is required to access LBR from registers. > The lbr_from_signext_quirk_needed() is introduced to determine whether > the TSX quirk should be applied. However, the > lbr_from_signext_quirk_needed() is invoked before the > intel_pmu_lbr_init(), which parses the LBR format information. Without > the correct LBR format information, the TSX quirk never be applied. > > Move the lbr_from_signext_quirk_needed() into the intel_pmu_lbr_init(). > Checking x86_pmu.lbr_has_tsx in the lbr_from_signext_quirk_needed() is > not required anymore. > > Both LBR_FORMAT_EIP_FLAGS2 and LBR_FORMAT_INFO have LBR_TSX flag, but > only the LBR_FORMAT_EIP_FLAGS2 requirs the quirk. Update the comments > accordingly. > > Fixes: 1ac7fd8159a8 ("perf/x86/intel/lbr: Support LBR format V7") > Reported-by: Vince Weaver > Signed-off-by: Kan Liang Thanks!