From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 760E8C19F2C for ; Wed, 3 Aug 2022 14:37:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235972AbiHCOhX (ORCPT ); Wed, 3 Aug 2022 10:37:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233330AbiHCOhU (ORCPT ); Wed, 3 Aug 2022 10:37:20 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A1DB19C1D for ; Wed, 3 Aug 2022 07:37:15 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id gj1so1759989pjb.0 for ; Wed, 03 Aug 2022 07:37:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc; bh=DikMXzSPR9SB1FD1PEwSoIy3cN2RFBQwNnjtdcuFOQ0=; b=S64VuIqgqzzDNLrkVOdNeMD8S1BIgQJTXTL9EVQN5P2AciUhw995F9/p270iVgQLMI 920PQ1iDEjy1dnCn/FbYQJLyHSd7W8SiPGWsZgpbI7Vboi5TSkmBY0EGBSRBweEkslio TWdOczuwSyPqyY2IPp5WbDMwXE5W7izNarKbzdrtlovvdvGmkIc2kNCGaD9NcE0+ClcP 4zQ6ODFGb3TpWizdQZ7pXXiLuSd82vwBPlEq6F0wlgNOUhKkCL0EpPPnCfx0GvD31xVY 9DofAAr5tCevBoazMR54Ij35ByHq8UGQ5nWdcaSkooA1paDp2yX/6nnp4auXs4HYodV4 +Zwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc; bh=DikMXzSPR9SB1FD1PEwSoIy3cN2RFBQwNnjtdcuFOQ0=; b=5ywU76jn5NGBraJ7RiM7HKEZbgFaP0l83Gr3Pp7ysdAzlwP1SwK62IzpYRMyOT5798 EI4QPum+FycOKfFszisyyW+CY81zwiNFMP27RWGLZCC8EsnpPvcvR758ijcXUsV/KZ34 xe5FUxI+zG+XasZP2iNLLDmIH3rqT+pfviWBak4wtUMbR9r27oLyI6h3mdid9fAhvnEb l/eFX5t6GR+4wg8JsKlawDpHCD5Cxie/zVHBh9G0ayqTIENiHAvSJ1LPMptn6ajpsJmb Pu71cuEiwoK986z97TIbVS8eLjOP03nkrqgalYgN23qIO2LGNiHOuji+3GKG4uxJuNg8 7QQQ== X-Gm-Message-State: ACgBeo2rtlHo3yUcKc3fNPvViLY128upNqaJEtJ3MweDhPLwQNSG9Vy4 Mm1pTB5fq+0oTVruox8xNnYQUzcTGOapzA== X-Google-Smtp-Source: AA6agR5XUZVVwElKYa8DKSNzWnPhbFD0Bnq7xBVKLuT6SJx2yjjZW4uAM39Q3eDL2SeuU5LFV1CjTQ== X-Received: by 2002:a17:902:6b4b:b0:16e:ef21:5664 with SMTP id g11-20020a1709026b4b00b0016eef215664mr14062872plt.122.1659537434815; Wed, 03 Aug 2022 07:37:14 -0700 (PDT) Received: from google.com (7.104.168.34.bc.googleusercontent.com. [34.168.104.7]) by smtp.gmail.com with ESMTPSA id n4-20020a17090a4e0400b001f53e3863casm1679034pjh.10.2022.08.03.07.37.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Aug 2022 07:37:14 -0700 (PDT) Date: Wed, 3 Aug 2022 14:37:10 +0000 From: Sean Christopherson To: Like Xu Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Paolo Bonzini Subject: Re: [PATCH 1/3] KVM: x86: Refresh PMU after writes to MSR_IA32_PERF_CAPABILITIES Message-ID: References: <20220727233424.2968356-1-seanjc@google.com> <20220727233424.2968356-2-seanjc@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 03, 2022, Like Xu wrote: > On 28/7/2022 7:34 am, Sean Christopherson wrote: > > Refresh the PMU if userspace modifies MSR_IA32_PERF_CAPABILITIES. KVM > > consumes the vCPU's PERF_CAPABILITIES when enumerating PEBS support, but > > relies on CPUID updates to refresh the PMU. I.e. KVM will do the wrong > > thing if userspace stuffs PERF_CAPABILITIES _after_ setting guest CPUID. > > > > Opportunistically fix a curly-brace indentation. > > > > Fixes: c59a1f106f5c ("KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for extended PEBS") > > Shouldn't it be: Fixes: 27461da31089 ("KVM: x86/pmu: Support full width counting") ? Strictly speaking, I don't think so? fw_writes_is_enabled() returns false if guest CPUID doesn't have X86_FEATURE_PDCM, and AFAICT there are no other side effects that are handled by intel_pmu_refresh(). > Now, all the dots have been connected. As punishment, I'd like to cook this > patch set more with trackable tests so that you have more time for other > things that are not housekeeping. Let me post v2, I've already done all the work and testing. If there's more to be done, we can figure out next steps from there.