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From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: acme@redhat.com, linux-kernel@vger.kernel.org,
	alexander.shishkin@linux.intel.com, ak@linux.intel.com,
	Jianfeng Gao <jianfeng.gao@intel.com>
Subject: Re: [RESEND PATCH] perf/x86/intel: Fix unchecked MSR access error for Alder Lake N
Date: Fri, 19 Aug 2022 10:05:40 +0200	[thread overview]
Message-ID: <Yv9EVP6O9r867om4@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <20220818181530.2355034-1-kan.liang@linux.intel.com>

On Thu, Aug 18, 2022 at 11:15:30AM -0700, kan.liang@linux.intel.com wrote:

> The Alder Lake N only has e-cores. The X86_FEATURE_HYBRID_CPU flag is
> not set. The perf cannot retrieve the correct CPU type via
> get_this_hybrid_cpu_type(). The model specific get_hybrid_cpu_type() is
> hardcode to p-core. The wrong CPU type is given to the PMU of the
> Alder Lake N.

If ADL-N isn't in fact a hybrid CPU, then *WHY* are we running
init_hybrid_pmu() and setting up all that nonsense?

That is, wouldn't the right thing be to remove ALDERLAKE_N from the rest
of {ALDER,RAPTOP}LAKE and create a non-hybrid PMU setup for it?

  reply	other threads:[~2022-08-19  8:06 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 18:15 [RESEND PATCH] perf/x86/intel: Fix unchecked MSR access error for Alder Lake N kan.liang
2022-08-19  8:05 ` Peter Zijlstra [this message]
2022-08-19  8:33   ` Peter Zijlstra
2022-08-22 13:24     ` Liang, Kan
2022-08-22 13:55       ` Peter Zijlstra
2022-08-22 15:20         ` Liang, Kan
2022-08-19 14:38 ` Peter Zijlstra
2022-08-22 13:28   ` Liang, Kan
2022-08-22 13:48     ` Peter Zijlstra
2022-08-22 14:31       ` Andi Kleen
2022-08-22 14:39     ` Peter Zijlstra
2022-08-22 14:51       ` Andrew Cooper
2022-08-22 14:59       ` Liang, Kan
2022-08-22 15:21         ` Peter Zijlstra
2022-08-22 15:08       ` Andi Kleen
2022-08-22 15:47         ` Peter Zijlstra
2022-08-22 18:21           ` Sean Christopherson
2022-08-22 19:21             ` Andi Kleen

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