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From: Jason Gunthorpe <jgg@nvidia.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: Baolu Lu <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	Christoph Hellwig <hch@infradead.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Fenghua Yu <fenghua.yu@intel.com>, Vinod Koul <vkoul@kernel.org>,
	Eric Auger <eric.auger@redhat.com>, Liu Yi L <yi.l.liu@intel.com>,
	Jacob jun Pan <jacob.jun.pan@intel.com>,
	Zhangfei Gao <zhangfei.gao@linaro.org>,
	Zhu Tony <tony.zhu@intel.com>,
	iommu@lists.linux.dev, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device()
Date: Wed, 7 Sep 2022 14:33:11 -0300	[thread overview]
Message-ID: <YxjV1y/FF0nCI/WO@nvidia.com> (raw)
In-Reply-To: <YxhqbhMmWLeFS512@myrica>

On Wed, Sep 07, 2022 at 10:54:54AM +0100, Jean-Philippe Brucker wrote:

> Is iommu_domain still going to represent both a device context (whole
> PASID table) and individual address spaces, or are you planning to move
> away from that?  What happens when a driver does:
> 
>   d1 = iommu_domain_alloc()
>   iommu_attach_device(d1)
>   d2 = iommu_sva_bind_device()
>   iommu_detach_device(d1)
> 
> Does detach
> (a) only disable the non-PASID address space?
> (b) disable everything?
> (c) fail because the driver didn't unbind first?

I think it must be (a), considering how everything is defined and the
needs for vIOMMU emulation.

If it is any other option then we have a problem of what to do if the
guest VM asks to change the page table associated with the RID while a
PASID is attached.
 
> I'm asking because the SMMU driver is still using smmu_domain to represent
> all address spaces + the non-PASID one, and using the same type
> "iommu_domain" for the new object makes things unreadable. I think
> internally we'll want to use distinct variable names, something like
> "domain" and "address_space". If (a) is not the direction you're going,
> then it may be worth renaming the API as well.
> 
> I'm also not sure why set_dev_pasid() is a domain_ops of the SVA domain,
> but acts on the parent domain which contains the PASID table. Shouldn't it
> be an IOMMU op like remove_dev_pasid(), or on the parent domain?

There is no "parent domain"

PASID or RID+PASID are completely equal concepts for binding.

If you are thinking "parent domain" because SMMU is storing the PASID
table in the RID's iommu_domain, then I think that is a misplacement
in the SMMU driver...

The PASID table belongs in the iommu driver's per-group data
structure. The iommu domain should only have the actual IOPTEs.

Otherwise everything blows up if you attach an iommu_domain to two
RIDs - the API demands that every RID gets its own PASID mapping, even
if the RID shares iommu_domains. We do not have an API to share PASID
tables.

Thus the PASID table is NOT part of the iommu_domain.

The exception will be for nested translation where we will have a
special ARM iommu_domain that contains the PASID table in userspace
memory. When this domain is attached it will logically claim the RID
and every PASID and thus disable the PASID API for that RID.

Remember also that an UNMANAGED iommu_domain should be attachable to
many PASID's and RID's concurrently.

Jason

  reply	other threads:[~2022-09-07 17:33 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-06 12:44 [PATCH v13 00/13] iommu: SVA and IOPF refactoring Lu Baolu
2022-09-06 12:44 ` [PATCH v13 01/13] iommu: Add max_pasids field in struct iommu_device Lu Baolu
2022-09-06 12:44 ` [PATCH v13 02/13] iommu: Add max_pasids field in struct dev_iommu Lu Baolu
2022-09-06 12:44 ` [PATCH v13 03/13] iommu: Remove SVM_FLAG_SUPERVISOR_MODE support Lu Baolu
2022-09-06 12:44 ` [PATCH v13 04/13] PCI: Enable PASID only when ACS RR & UF enabled on upstream path Lu Baolu
2022-09-06 12:44 ` [PATCH v13 05/13] iommu: Add attach/detach_dev_pasid iommu interfaces Lu Baolu
2022-09-22 15:49   ` Jason Gunthorpe
2022-09-06 12:44 ` [PATCH v13 06/13] iommu: Add IOMMU SVA domain support Lu Baolu
2022-09-06 12:44 ` [PATCH v13 07/13] iommu/vt-d: Add " Lu Baolu
2022-09-22 15:49   ` Jason Gunthorpe
2022-09-23  2:21     ` Baolu Lu
2022-09-23 12:15       ` Jason Gunthorpe
2022-09-23 12:41         ` Baolu Lu
2022-09-23 13:07           ` Jason Gunthorpe
2022-09-23 13:12             ` Baolu Lu
2022-09-06 12:44 ` [PATCH v13 08/13] arm-smmu-v3/sva: " Lu Baolu
2022-09-22 15:53   ` Jason Gunthorpe
2022-09-06 12:44 ` [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device() Lu Baolu
2022-09-06 16:36   ` Jean-Philippe Brucker
2022-09-07  1:27     ` Baolu Lu
2022-09-07  9:54       ` Jean-Philippe Brucker
2022-09-07 17:33         ` Jason Gunthorpe [this message]
2022-09-08 16:25           ` Jean-Philippe Brucker
2022-09-08 16:41             ` Jason Gunthorpe
2022-09-09  1:54               ` Baolu Lu
2022-09-22 16:00   ` Jason Gunthorpe
2022-09-23  2:31     ` Baolu Lu
2022-09-06 12:44 ` [PATCH v13 10/13] iommu: Remove SVA related callbacks from iommu ops Lu Baolu
2022-09-06 12:44 ` [PATCH v13 11/13] iommu: Prepare IOMMU domain for IOPF Lu Baolu
2022-09-22 16:05   ` Jason Gunthorpe
2022-09-06 12:44 ` [PATCH v13 12/13] iommu: Per-domain I/O page fault handling Lu Baolu
2022-09-06 12:44 ` [PATCH v13 13/13] iommu: Rename iommu-sva-lib.{c,h} Lu Baolu
2022-09-12  3:05 ` [PATCH v13 00/13] iommu: SVA and IOPF refactoring Baolu Lu
2022-09-23 13:08   ` Baolu Lu

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